at89c5131 ATMEL Corporation, at89c5131 Datasheet - Page 145

• Manufacturer Part Number: at89c5131
• Description: 8-bit Flash Microcontroller With Full Speed Usb Device At89c5131
• Manufacturer: ATMEL Corporation

4136C–USB–04/05
Table 101. UEPINT Register
UEPINT (S:F8h read-only)
USB Endpoint Interrupt Register
Reset Value = 00h
Bit Number
7
-
7
6
5
4
3
2
1
0
Mnemonic Description
EP6INT
EP6INT
EP5INT
EP4INT
EP3INT
EP2INT
EP1INT
EP0INT
Bit
6
-
Reserved
The value read from this bit is always 0. Do not set this bit.
Endpoint 6 Interrupt
This bit is set by hardware when an endpoint interrupt source has been detected on the
endpoint 6. The endpoint interrupt sources are in the UEPSTAX register and can be: TXCMP,
RXOUTB0, RXOUTB1, RXSETUP or STLCRC.
A USB interrupt is triggered when the EP6IE bit in the UEPIEN register is set.
This bit is cleared by hardware when all the endpoint interrupt sources are cleared
Endpoint 5 Interrupt
This bit is set by hardware when an endpoint interrupt source has been detected on the
endpoint 5. The endpoint interrupt sources are in the UEPSTAX register and can be: TXCMP,
RXOUTB0, RXOUTB1, RXSETUP or STLCRC.
A USB interrupt is triggered when the EP5IE bit in the UEPIEN register is set.
This bit is cleared by hardware when all the endpoint interrupt sources are cleared
Endpoint 4 Interrupt
This bit is set by hardware when an endpoint interrupt source has been detected on the
endpoint 4. The endpoint interrupt sources are in the UEPSTAX register and can be: TXCMP,
RXOUTB0, RXOUTB1, RXSETUP or STLCRC.
A USB interrupt is triggered when the EP4IE bit in the UEPIEN register is set.
This bit is cleared by hardware when all the endpoint interrupt sources are cleared
Endpoint 3 Interrupt
This bit is set by hardware when an endpoint interrupt source has been detected on the
endpoint 3. The endpoint interrupt sources are in the UEPSTAX register and can be: TXCMP,
RXOUTB0, RXOUTB1, RXSETUP or STLCRC.
A USB interrupt is triggered when the EP3IE bit in the UEPIEN register is set.
This bit is cleared by hardware when all the endpoint interrupt sources are cleared
Endpoint 2 Interrupt
This bit is set by hardware when an endpoint interrupt source has been detected on the
endpoint 2. The endpoint interrupt sources are in the UEPSTAX register and can be: TXCMP,
RXOUTB0, RXOUTB1, RXSETUP or STLCRC.
A USB interrupt is triggered when the EP2IE bit in the UEPIEN register is set.
This bit is cleared by hardware when all the endpoint interrupt sources are cleared
Endpoint 1 Interrupt
This bit is set by hardware when an endpoint interrupt source has been detected on the
endpoint 1. The endpoint interrupt sources are in the UEPSTAX register and can be: TXCMP,
RXOUTB0, RXOUTB1, RXSETUP or STLCRC.
A USB interrupt is triggered when the EP1IE bit in the UEPIEN register is set.
This bit is cleared by hardware when all the endpoint interrupt sources are cleared
Endpoint 0 Interrupt
This bit is set by hardware when an endpoint interrupt source has been detected on the
endpoint 0. The endpoint interrupt sources are in the UEPSTAX register and can be: TXCMP,
RXOUTB0, RXOUTB1, RXSETUP or STLCRC.
A USB interrupt is triggered when the EP0IE bit in the UEPIEN register is set.
This bit is cleared by hardware when all the endpoint interrupt sources are cleared
EP5INT
5
EP4INT
4
EP3INT
3
EP2INT
2
AT89C5131
EP1INT
1
EP0INT
0
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