lm2512asnx National Semiconductor Corporation, lm2512asnx Datasheet
lm2512asnx
Related parts for lm2512asnx
lm2512asnx Summary of contents
Page 1
... UFBGA, 4 mm, 0.5 mm pitch, Reel of 1000 LM2512ASMX 49L UFBGA, 4 mm, 0.5 mm pitch, Reel of 4500 LM2512ASN 40L LLP, 6.0 X 6.0 X 0.4 mm, 0.5 mm pitch, Reel of 1000 LM2512ASNX 40L LLP, 6.0 X 6.0 X 0.4 mm, 0.5 mm pitch, Reel of 4500 © 2007 National Semiconductor Corporation Features ■ 24-bit RGB Interface support up to 640 x 480 VGA format ■ ...
Page 2
Pin Descriptions No. Pin Name of Pins MPL SERIAL BUS PINS MD[2: SPI INTERFACE and CONFIGURATION PINS SPI_CSX 1 SPI_SCL 1 SPI_SDA/HS 1 PD* 1 RES1 VIDEO INTERFACE PINS PCLK 1 R[7:0] ...
Page 3
Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (V ) DDA Supply Voltage ( Supply Voltage (V ) DDIO LVCMOS Input/Output Voltage MPL ...
Page 4
Switching Characteristics Over recommended operating supply and temperature ranges unless otherwise specified. (Note 2) Symbol Parameter PARALLEL BUS TIMING t Set Up Time SET t Hold Time HOLD SERIAL BUS TIMING t Serial Data Valid before Clock DVBC Edge t ...
Page 5
Recommended Input Timing Requirements (PCLK and SPI) Over recommended operating supply and temperature ranges unless otherwise specified. (Note 2) Symbol Parameter PIXEL CLOCK (PCLK) f Pixel Clock Frequency PCLK PCLK Pixel Clock Duty Cycle DC t Transition Time T t ...
Page 6
Timing Diagrams www.national.com FIGURE 1. Input Timing for RGB Interface FIGURE 2. Serial Data Valid FIGURE 3. Stop PClock Power Down FIGURE 4. Stop PClock Power Up 6 30015326 30015316 30015329 30015330 ...
Page 7
Functional Description The LM2512A is a Mobile Pixel Link (MPL) Serializer that se- rializes a 24-bit RGB plus three control signals (VS, HS, and DE) to two or three MPL MD lines plus the serial clock MC. Two options are ...
Page 8
BUS OVERVIEW The LM2512A is a multi-lane MPL Serializer that supports a 24-bit RGB source interface. The MPL physical layer is pur- pose-built for an extremely low power and low EMI data transmission while requiring the fewest number of signal ...
Page 9
OFF PHASE In the OFF phase, MPL transmitters are turned off with zero current flowing on the MC and MDn lines. Figure 10 shows the transition of the MPL bus into the OFF phase MPL line is driven ...
Page 10
FIGURE 11. 24-bit to 18-bit Dithered Lane, RGB Transaction FIGURE 12. 24-bit to 18-bit Dithered Lane (Default), RGB Transaction (NOTE MD1 and MD2) Serial Payload Parity Bit Odd Parity is calculated on the RGB bits, control ...
Page 11
OPTIONAL LOOK UP TABLE AND SPI INTERFACE Three 256 X 8-bit SRAMs provide a Look Up Table for inde- pendent color correction. The LUT is disabled by default and also after a device PD* cycle. The PD* cycle can be ...
Page 12
FIGURE 13. LM2512A WRITE & READ to 3-signal SPI HOST FIGURE 14. LM2512A WRITE only to 4-signal SPI HOST www.national.com 12 30015388 30015389 ...
Page 13
LM2512A SPI Registers Name Addre Type ss Command 0x00 R/W Configuration 0x01 R/W (Note 13) Red RAM Address 0x02 R/W Red RAM Data 0x03 R/W Green RAM Address 0x04 R/W Green RAM Data 0x05 R/W Blue RAM Address 0x06 R/W ...
Page 14
SPI Timing www.national.com FIGURE 15. 16-bit SPI WRITE FIGURE 16. 16-bit SPI READ FIGURE 17. SPI PAGE WRITE 14 30015390 30015391 30015393 ...
Page 15
Power Up Sequence The MPL Link must be powered up and enabled in a certain sequence for proper operation of the link and devices. The following list provides the recommended sequence: 1. Apply Power (See Power Supply Section) 2. PD* ...
Page 16
PCLK signal. Once this is completed, video data transmission occurs and the link is ON. Application Configurations Many different application configurations are possible with the flexible LM2512A Serializer. These include: LM2512A Operation POWER SUPPLIES The V and V (MPL ...
Page 17
Application Information SYSTEM BANDWIDTH CALCULATIONS For a HVGA (320 X 480) application with the following as- sumptions +/−5% refresh rate, 10% blanking, RGB666, and 2 MD Lanes and following calculations can be made: Calculate PCLK - 320 X ...
Page 18
Connection Diagram 49 UFBGA Package RGB SER Pinout SER SPI_SDA/ PCLK D V SSIO www.national.com TOP VIEW (not to scale RES1 ...
Page 19
Connection Diagram 40 LLP Package TOP VIEW (not to scale) 19 30015396 www.national.com ...
Page 20
Physical Dimensions www.national.com inches (millimeters) unless otherwise noted 49L UFBGA, 0.5mm pitch Order Number LM2512ASM NS Package Number SLH49A 40L LLP, 0.5mm pitch Order Number LM2512ASN NS Package Number SNA40A 20 ...
Page 21
Notes 21 www.national.com ...
Page 22
... National Semiconductor and the National Semiconductor logo are registered trademarks of National Semiconductor Corporation. All other brand or product names may be trademarks or registered trademarks of their respective holders. ...