ncn6004a ON Semiconductor, ncn6004a Datasheet - Page 28
ncn6004a
Manufacturer Part Number
ncn6004a
Description
Dual Sam/sim Interface Integrated Circuit
Manufacturer
ON Semiconductor
Datasheet
1.NCN6004A.pdf
(40 pages)
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coming
re−synchronization. Since the clock signal is asynchronous,
it is up to the programmer to make sure the next card
transaction is not activated before, respectively, either the
The example given in Figure 25 highlights the delay
from
the
CLOCK programming is activated
by the PGM rising edge.
internal
CARD_SEL
CLOCK_IN
CLOCK : 2
CLOCK : 4
CLOCK : 8
CRD_CLK
clock
Figure 26. Card Clock 1/2 Divider Operation
PGM
Figure 25. Clock Programming Timings
CS
A0
A1
A2
A3
duty
http://onsemi.com
cycle
NCN6004A
28
Clock is updated upon CLOCK :8 rising edge
CRD_CLK_A or CRD_CLK_B signal has been updated.
Generally speaking, such a delay can be derived from the
maximum
interface.
clock
frequency
provided
to
the