adg5409 Analog Devices, Inc., adg5409 Datasheet - Page 19

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adg5409

Manufacturer Part Number
adg5409
Description
High Voltage Latch-up Proof, 4-/8-channel Multiplexers Adg5408/adg5409
Manufacturer
Analog Devices, Inc.
Datasheet

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ADG5408/ADG5409
TRENCH ISOLATION
NMOS
PMOS
In the ADG5408/ADG5409, an insulating oxide layer (trench)
is placed between the NMOS and the PMOS transistors of each
CMOS switch. Parasitic junctions, which occur between the
transistors in junction isolated switches, are eliminated, and the
result is a completely latch-up proof switch.
In junction isolation, the N and P wells of the PMOS and
NMOS transistors form a diode that is reverse-biased under
P-WELL
N-WELL
normal operation. However, during overvoltage conditions, this
diode can become forward-biased. A silicon controlled rectifier
(SCR) type circuit is formed by the two transistors causing a
significant amplification of the current that, in turn, leads to
TRENCH
latch-up. With trench isolation, this diode is removed, and the
BURIED OXIDE LAYER
result is a latch-up proof switch.
HANDLE WAFER
Figure 36. Trench Isolation
Rev. 0 | Page 19 of 24

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