adl5382 Analog Devices, Inc., adl5382 Datasheet
adl5382
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adl5382 Summary of contents
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... Differential dc offsets at the I and Q outputs are typically <10 mV. Both of these factors contribute to the excellent IIP2 specifications which is >60 dBm. The ADL5382 operates off a single 4. 5.25 V supply. The supply current is adjustable with an external resistor from the BIAS pin to ground. The ADL5382 is fabricated using the Analog Devices, Inc., advanced Silicon-Germanium bipolar process and is available in a 24-lead exposed paddle LFCSP ...
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... ADL5382 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 ESD Caution.................................................................................. 5 Pin Configuration and Function Descriptions............................. 6 Typical Performance Characteristics ............................................. 7 Distributions for f = 900 MHz ............................................... 10 RF Distributions for f = 1900 MHz............................................. 11 RF Distributions for f = 2700 MHz............................................. 12 RF Circuit Description ...
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... With a −5 dBm interferer 5 MHz away −5 dBm each input tone −5 dBm each input tone RFIN, RFIP terminated in 50 Ω LOIN, LOIP terminated in 50 Ω RFIN, RFIP terminated in 50 Ω With a −5 dBm interferer 5 MHz away Rev Page ADL5382 Min Typ Max Unit 0.7 2.7 GHz − ...
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... ADL5382 Parameter DYNAMIC PERFORMANCE 2700 MHz Conversion Gain Input P1dB Second-Order Input Intercept (IIP2) Third-Order Input Intercept (IIP3 Magnitude Imbalance IQ Phase Imbalance Noise Figure Condition RFIP, RFIN −5 dBm each input tone −5 dBm each input tone RFIN, RFIP terminated in 50 Ω ...
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... Exposure to absolute 15 dBm (re: 50 Ω) maximum rating conditions for extended periods may affect 1230 mW device reliability. 54°C/W 150°C −40°C to +85°C ESD CAUTION −65°C to +125°C Rev Page ADL5382 ...
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... Exposed Paddle. Connect to a low impedance thermal and electrical ground plane CMRF CMRF RFIP RFIN CMRF VPX 1 VPA 18 VPB 2 COM VPB 17 3 BIAS QHI 16 ADL5382 TOP VIEW 4 VPL QLO 15 (Not to Scale) 5 VPL IHI VPL ILO CML LOIP LOIN CML CML COM 7 8 ...
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... Figure 8. IQ Quadrature Phase Error vs. RF Frequency Rev Page ADL5382 100 BASEBAND FREQUENCY (MHz –40° +25° +85°C A 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 RF FREQUENCY (MHz) Figure 7 ...
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... ADL5382 20 IIP2, Q CHANNEL IIP2, I CHANNEL 15 NOISE FIGURE 10 IIP3 5 GAIN 0 –6 –5 –4 –3 –2 – LEVEL (dBm) Figure 9. Conversion Gain, IP1dB, Noise Figure, IIP3, and IIP2 vs. LO Level 900 MHz –40° +25° +85° SUPPLY CURRENT ...
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... Figure 20. LO Port Return Loss vs. LO Frequency Measured on Characterization Board through an ETC1-1-13 Balun Rev Page ADL5382 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 LO FREQUENCY (MHz) Figure 18. LO-to-RF Leakage vs. LO Frequency 900 1100 1300 1500 1700 1900 2100 2300 2500 2700 RF FREQUENCY (MHz) Figure 19 ...
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... ADL5382 DISTRIBUTIONS FOR f = 900 MHz RF 100 T = –40° +25° +85° INPUT IP3 (dBm) Figure 21. IIP3 Distributions 100 T = –40° +25° +85° INPUT P1dB (dBm) Figure 22. IP1dB Distributions, f ...
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... +25° +85° 14.0 14.5 15.0 15.5 16.0 NOISE FIGURE (dB) Figure 31. Noise Figure Distributions 1900 MHz RF 100 T = –40° +25° +85° –1.00 –0.75 –0.50 –0.25 0 0.25 0.50 QUADRATURE PHASE ERROR (Degrees) ADL5382 1900 MHz RF 16.5 17.0 0.75 1.00 = 1900 MHz RF ...
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... ADL5382 DISTRIBUTIONS FOR f = 2700 MHz RF 100 T = –40° +25° +85° INPUT IP3 (dBm) Figure 33. IIP3 Distributions 100 T = –40° +25° +85° INPUT P1dB (dBm) Figure 34. IP1dB Distributions, f ...
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... CIRCUIT DESCRIPTION The ADL5382 can be divided into five sections: the local oscillator (LO) interface, the RF voltage-to-current (V-to-I) converter, the mixers, the differential emitter follower outputs, and the bias circuit. A detailed block diagram of the device is shown in Figure 39. BIAS RFIP POLYPHASE QUADRATURE PHASE SPLITTER RFIN Figure 39 ...
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... BASIC CONNECTIONS Figure 41 shows the basic connections schematic for the ADL5382. POWER SUPPLY The nominal voltage supply for the ADL5382 and is applied to the VPA, VPB, VPL, and VPX pins. Ground should be connected to the COM, CML, and CMRF pins. The exposed paddle on the underside of the package should also be soldered to a low thermal and electrical impedance ground plane ...
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... VPOS − 2.8 V. The output 3 dB bandwidth is 370 MHz. Figure 44 shows the baseband output configuration. Rev Page –10 –12 –14 –16 –18 –20 –22 –24 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 FREQUENCY (GHz) Figure 43. Differential RF Port Return Loss 16 QHI QHI QLO 15 QLO IHI 14 IHI 13 ILO ILO Figure 44. Baseband Output Configuration ADL5382 2.5 2.7 2.9 ...
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... RF Input Power for a 16 QAM 160 ksym/s Signal Figure 46 shows the zero-IF EVM performance MHz IEEE 802.16e WiMAX signal through the ADL5382. The differential dc offsets on the ADL5382 are in the order of a few millivolts. However, ac coupling the baseband outputs with 10 µF capacitors eliminates dc offsets and enhances EVM performance. With a 10 MHz BW signal, 10 µ ...
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... It is necessary to consider the overall source and load impedance presented by the ADL5382 and ADC input to design the filter network. The differential baseband output impedance of the ADL5382 is 50 Ω. The ADL5382 is designed to drive a high impedance ADC input. It may be desirable to terminate the ADC input down to lower impedance by using a terminating resistor, such as 500 Ω ...
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... As an example, a second-order Butterworth, low-pass filter design is shown in Figure 50 where the differential load impedance is 500 Ω and the source impedance of the ADL5382 is 50 Ω. The normalized series inductor value for the 10-to-1, load-to-source impedance ratio is 0.074 H, and the normalized shunt capacitor is 14.814 F. For a 10.9 MHz cutoff frequency, the single-ended equivalent circuit consists of a 0.54 µ ...
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... Figure 53. Sixth-Order Low-Pass Butterworth, Baseband Filter Schematic 1000pF 33nH VPB 18 100pF 0.1µF VPB 17 QHI 16 QLO 15 IHI 14 ILO 1000pF ETC1-1-13 Rev Page ADL5382 C AC 10µF 27µH 27µH 10µ 10µF V POS 27µH 27µH 10µ 10µF 27µH 27µH 10µ 10µF 27µH 27µH ...
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... ADL5382 As the load impedance of the filter increases, the filter design becomes more challenging in terms of meeting the required rejection and pass band specifications. In the previous W- CDMA example, the 500 Ω load impedance resulted in the design of a sixth-order filter that has relatively large inductor values and small capacitor values. If the load impedance is 200 Ω ...
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... For all measurements of the ADL5382, the loss of the RF input balun (the M/A-COM ETC1-1-13 was used on RF input during characterization) was de-embedded. ...
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... LOW NOISE PREAMP 3dB PAD AMPLIFIER IN RF 3dB PAD AGILENT 3dB PAD 11636A RF RF 6dB PAD Q GND ADL5382 CHAR BOARD V POS I 6dB PAD LO IEEE IEEE R&S FSEA30 SPECTRUM ANALYZER Figure 59. General Characterization Setup Rev Page R&S FSEA30 SPECTRUM ANALYZER FILTER ...
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... EVALUATION BOARD The ADL5382 evaluation board is available. The board can be used for single-ended or differential baseband analysis. The default configuration of the board is for single-ended baseband analysis. VPOS VPOS RFC C11 C10 VPA VPB 18 2 COM ...
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... ADL5382 Table 4. Evaluation Board Configuration Options Component Function VPOS, GND Power Supply and Ground Vector Pins. R1, R3, R6 Power Supply Decoupling. Shorts or power supply decoupling resistors. C1, C2, C3, These capacitors provide the required decoupling up to 2.7 GHz. C4, C8, C9 C6, C7, AC Coupling Capacitors. These capacitors provide the required ac coupling from C10, C11 700 MHz to 2 ...
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... Figure 61. Evaluation Board Top Layer Figure 62. Evaluation Board Top Layer Silkscreen Rev Page ADL5382 ...
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... ADL5382 Figure 63. Evaluation Board Bottom Layer Figure 64. Evaluation Board Bottom Layer Silkscreen Rev Page ...
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... Body, Very Thin Quad (CP-24-2) Dimensions shown in millimeters Package Description 24-Lead LFCSP_VQ, 7” Tape and Reel 24-Lead LFCSP_VQ, Waffle Pack Evaluation Board Rev Page 0.60 MAX PIN 1 INDICATOR 2.45 EXPOSED 2.30 SQ PAD (BO TTOMVIEW) 2. 0.23 MIN 2.50 REF Package Option Ordering Quantity CP-24-2 1,500 CP-24-2 64 ADL5382 ...
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... ADL5382 NOTES ©2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07208-0-3/08(0) T Rev Page ...