74ALVC162374T Fairchild Semiconductor, 74ALVC162374T Datasheet
74ALVC162374T
Specifications of 74ALVC162374T
Related parts for 74ALVC162374T
74ALVC162374T Summary of contents
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... CMOS power dissipation. Ordering Code: Order Number Package Number 74ALVC162374T MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol © ...
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Connection Diagram Functional Description The 74ALVC162374 consists of sixteen edge-triggered flip- flops with individual D-type inputs and 3-STATE true out- puts. The device is byte controlled with each byte function- ing identically, but independent of the other. The control pins ...
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Absolute Maximum Ratings Supply Voltage ( Input Voltage ( Output Voltage (V ) (Note 3) 0. Input Diode Current ( Output Diode Current (I ) ...
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AC Electrical Characteristics Symbol Parameter V CC Min f Maximum Clock Frequency 250 MAX Propagation Delay PHL PL 1.3 Bus to Bus Output Enable Time 1.3 PZL PZH Output Disable Time ...
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AC Loading and Waveforms FIGURE 1. AC Test Circuit (Input Characteristics: f Symbol 3.3V 0. FIGURE 2. Waveform for Inverting and ...
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Physical Dimensions inches (millimeters) unless otherwise noted 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Body Width Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...