s-75l08anc Seiko Instruments Inc., s-75l08anc Datasheet

no-image

s-75l08anc

Manufacturer Part Number
s-75l08anc
Description
Mini Logic Series 2 Input Nand Gate
Manufacturer
Seiko Instruments Inc.
Datasheet
Rev.2.2
MINI LOGIC SERIES
2 INPUT NAND GATE
• Wide power supply range:
• Low current consumption:
• Typical propagation delay:
• High noise immunity:
• Power down protection:
• Very small plastic package: SC-88A
• Lead-free products
Features
Pin Assignment
Logic Diagram
IN B
IN A
GND
IN B
IN A
_00
1
2
3
(Top view)
2 V to 5.5 V
1.0 µA max. (at 5.5 V, 25°C)
t
V
All pins
PD
NIH
The S-75V00ANC is a single 2-Input NAND Gate fabricated by utilizing
advanced silicon-gate CMOS technology which provides the inherent
benefit of CMOS low power consumption to achieve ultra high speed
operation correspond to LSTTL IC’s.
All gates of the internal circuitry have buffered outputs to ensure high noise
immunity and output stability.
Input voltage is allowed to be applied even if power voltage is not supplied
because no diode is inserted between an input pin and V
This allows for interfaces between power supplies of different voltage,
output level conversion from 5 V to 3 V and battery backup applications.
= 3.7 ns (at 5 V)
=V
OUT Y
5
4
NIL
=28% V
OUT Y
VCC
Seiko Instruments Inc.
CC
min.
True Values
Marking Specification
1
5
A
H
H
L
L
(Top view)
5V1
2
Applications
• Personal computers, peripherals
• Cellular phones
• Cameras
• Games
H
H
B
L
L
4
3
S-75V00ANC
Product code
H
H
H
Y
L
CC
.
1

Related parts for s-75l08anc

s-75l08anc Summary of contents

Page 1

... All gates of the internal circuitry have buffered outputs to ensure high noise immunity and output stability. Input voltage is allowed to be applied even if power voltage is not supplied because no diode is inserted between an input pin and V This allows for interfaces between power supplies of different voltage, output level conversion from and battery backup applications ...

Page 2

... Board size : (2) Board name : JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Power Dissipation of Package (When Mounted on Board) 2 ...

Page 3

... "H" level Output Voltage "L" level Input Current Current Consump MINI LOGIC SERIES 2 INPUT NAND GATE Symbol OUT 0 to 100 (V dt/ Conditions V MIN. CC 2.0 1 5.5 V X0.7 CC  2 5.5  ...

Page 4

... MINI LOGIC SERIES 2 INPUT NAND GATE S-75V00ANC AC Characteristics Parameter Symbol Propagation Delay Time Input Capacitance Equiv. Int. Capacitance the no-load equivalent capacitance inside the circuitry. Refer to the measurement circuit shown *1. PD below. Current consumption is averaged by the following equation CC(opr) PD ...

Page 5

... All gates of the internal circuitry have buffered outputs to ensure high noise immunity and output stability. Input voltage is allowed to be applied even if power voltage is not supplied because no diode is inserted between an input pin and V This allows for interfaces between power supplies of different voltage, output level conversion from and battery backup applications ...

Page 6

... Board size : (2) Board name : JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Power Dissipation of Package (When Mounted on Board) 6 ...

Page 7

... V IL "H" level Output Voltage V IN "L" level Input Current Current Consump MINI LOGIC SERIES 2 INPUT NOR GATE Symbol OUT 0 to 100 (V dt/ Conditions V MIN. CC 2.0 1 5.5 V X0.7 CC  2.0  ...

Page 8

... MINI LOGIC SERIES 2 INPUT NOR GATE S-75V02ANC AC Characteristics Parameter Symbol Propagation Delay Time Input Capacitance Equiv. Int. Capacitance the no-load equivalent capacitance inside the circuitry. Refer to the measurement circuit shown *1. PD below. Current consumption is averaged by the following equation CC(opr) PD ...

Page 9

... LSTTL IC’s. The special purpose unbuffered circuit design is suitable for a wide veriety of linear circuits. Input voltage is allowed to be applied even if power voltage is not supplied because no diode is inserted between an input pin and V This allows for interfaces between power supplies of different voltage, output level conversion from and battery backup applications. ...

Page 10

... Board size : (2) Board name : JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Power Dissipation of Package (When Mounted on Board) 10 ...

Page 11

... Rev.2.2 _00 Recommended Operating Conditions Parameter Power Voltage Input Voltage Output Voltage Input Rise and Fall Time DC Characteristics Parameter Symbol "H" level V IH Input Voltage "L" level V IL "H" level Output Voltage "L" level ...

Page 12

... MINI LOGIC SERIES INVERTER S-75V04ANC AC Characteristics Parameter Symbol Propagation Delay Time Input Capacitance Equiv. Int. Capacitance the no-load equivalent capacitance inside the circuitry. Refer to the measurement circuit shown *1. PD below. Current consumption is averaged by the following equation CC(opr Measurement Circuit ...

Page 13

... LSTTL IC’s. The special purpose unbuffered circuit design is suitable for a wide variety of linear circuits. Input voltage is allowed to be applied even if power voltage is not supplied because no diode is inserted between an input pin and V This allows for interfaces between power supplies of different voltage, output level conversion from and battery backup applications. ...

Page 14

... Board size : (2) Board name : JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Power Dissipation of Package (When Mounted on Board) 14 ...

Page 15

... "H" level GND IN Output Voltage V IN "L" level Input Current Current Consump MINI LOGIC SERIES INVERTER (unbuffer) Symbol OUT Conditions V MIN. CC 2.0 1 OUT 5.5 V X0.8 CC 2.0  OUT 5.5  ...

Page 16

... MINI LOGIC SERIES INVERTER (unbuffer) S-75VU04ANC AC Characteristics Parameter Symbol Propagation Delay Time Input Capacitance Equiv. Int. Capacitance the no-load equivalent capacitance inside the circuitry. Refer to the measurement circuit shown *1. PD below. Current consumption is averaged by the following equation CC(opr ...

Page 17

... All gates of the internal circuitry have buffered outputs to ensure high noise immunity and output stability. Input voltage is allowed to be applied even if power voltage is not supplied because no diode is inserted between an input pin and V This allows for interfaces between power supplies of different voltage, output level conversion from and battery backup applications ...

Page 18

... Board size : (2) Board name : JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Power Dissipation of Package (When Mounted on Board) 18 ...

Page 19

... V IL "H" level Output Voltage "L" level Input Current Current Consump MINI LOGIC SERIES 2 INPUT AND GATE Symbol OUT 0 to 100 (V dt/ Conditions V MIN. CC 2.0 1 5.5 V X0.7 CC 2.0  5.5  ...

Page 20

... MINI LOGIC SERIES 2 INPUT AND GATE S-75V08ANC AC Characteristics Parameter Symbol Propagation Delay Time Input Capacitance Equiv. Int. Capacitance the no-load equivalent capacitance inside the circuitry. Refer to the measurement circuit shown *1. PD below. Current consumption is averaged by the following equation CC(opr) PD ...

Page 21

... All gates of the internal circuitry have buffered outputs to ensure high noise immunity and output stability. Input voltage is allowed to be applied even if power voltage is not supplied because no diode is inserted between an input pin and V This allows for interfaces between power supplies of different voltage, output level conversion from and battery backup applications ...

Page 22

... Board size : (2) Board name : JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Power Dissipation of Package (When Mounted on Board) 22 ...

Page 23

... Threshold Voltage "L" level V N Hysteresis V H "H" level Output Voltage "L" level Input Current Current Consump MINI LOGIC SERIES SCHMITT INVERTER Symbol OUT Conditions V MIN. CC  3.0  4.5  5.5 3.0 0.90 4.5 1.35 5.5 1.65 3.0 0.30 4.5 0.40 5.5 ...

Page 24

... MINI LOGIC SERIES SCHMITT INVERTER S-75V14ANC AC Characteristics Parameter Symbol Propagation Delay Time Input Capacitance Equiv. Int. Capacitance the no-load equivalent capacitance inside the circuitry. Refer to the measurement circuit shown *1. PD below. Current consumption is averaged by the following equation fin+I CC(opr ...

Page 25

... All gates of the internal circuitry have buffered outputs to ensure high noise immunity and output stability. Input voltage is allowed to be applied even if power voltage is not supplied because no diode is inserted between an input pin and V This allows for interfaces between power supplies of different voltage, output level conversion from and battery backup applications ...

Page 26

... Board size : (2) Board name : JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Power Dissipation of Package (When Mounted on Board) 26 ...

Page 27

... "H" level Output Voltage "L" level Input Current Current Consump MINI LOGIC SERIES 2 INPUT OR GATE Symbol OUT 0 to 100 (V dt/ Conditions V MIN. CC 2.0 1 5.5 V X0.7 CC 2.0  5.5  ...

Page 28

... MINI LOGIC SERIES 2 INPUT OR GATE S-75V32ANC AC Characteristics Parameter Symbol Propagation Delay Time Input Capacitance Equiv. Int. Capacitance the no-load equivalent capacitance inside the circuitry. Refer to the measurement circuit shown *1. PD below. Current consumption is averaged by the following equation CC(opr ...

Page 29

... All gates of the internal circuitry have buffered outputs to ensure high noise immunity and output stability. Input voltage is allowed to be applied even if power voltage is not supplied because no diode is inserted between an input pin and V This allows for interfaces between power supplies of different voltage, output level conversion from and battery backup applications ...

Page 30

... Board size : (2) Board name : JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Power Dissipation of Package (When Mounted on Board) 30 ...

Page 31

... "H" level Output Voltage V IN "L" level Input Current Current Consump MINI LOGIC SERIES EXCLUSIVE OR GATE Symbol OUT 0 to 100 (V dt/ Conditions V MIN. CC 2.0 1 5.5 V X0.7 CC 2.0  5.5  ...

Page 32

... MINI LOGIC SERIES EXCLUSIVE OR GATE S-75V86ANC AC Characteristics Parameter Symbol Propagation Delay Time Input Capacitance Equiv. Int. Capacitance the no-load equivalent capacitance inside the circuitry. Refer to the measurement circuit shown *1. PD below. Current consumption is averaged by the following equation CC(opr ...

Page 33

... V). The internal circuitry has buffered outputs to ensure high noise immunity and output stability. Input voltage is allowed to be applied even if power voltage is not supplied because no diode is inserted between an input pin and V This allows for interfaces between power supplies of different voltage, output level conversion from and battery backup applications ...

Page 34

... Board size : (2) Board name : JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Power Dissipation of Package (When Mounted on Board) 34 ...

Page 35

... "H" level Output Voltage "L" level Input Current Current Consump MINI LOGIC SERIES 2 INPUT NAND GATE Symbol OUT dt/dv Conditions V MIN. CC 1.0 0.75 1.5 1.05 3.0 2.10  1.0  1.5  3.0 1.0 0.9 I =-20 µA 1 ...

Page 36

... THL t PLH Propagation Delay Time t PHL Input Capacitance C IN Equiv.Int. Capacitance the no-load equivalent capacitance inside the circuitry. Refer to the measurement circuit shown *1. PD below. Current consumption is averaged by the following equation CC(opr Measurement Circuit VIN PG 50 Ω ...

Page 37

... V). The internal circuitry has buffered outputs to ensure high noise immunity and output stability. Input voltage is allowed to be applied even if power voltage is not supplied because no diode is inserted between an input pin and V This allows for interfaces between power supplies of different voltage, output level conversion from and battery backup applications ...

Page 38

... Board size : (2) Board name : JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Power Dissipation of Package (When Mounted on Board) 38 ...

Page 39

... "H" level V OH Output Voltage "L" level Input Current Current Consump MINI LOGIC SERIES 2 INPUT NOR GATE Symbol OUT dt/dv Conditions V MIN. CC 1.0 0.75 1.5 1.05 3.0 2.10 1.0   1.5  3.0 1.0 0.9 =-20 µ ...

Page 40

... Output Rise/Fall Time t THL t PLH Propagation Delay Time t PHL Input Capacitance C IN Equiv. Int. Capacitance the no-load equivalent capacitance inside the circuitry. Refer to the measurement circuit shown *1. PD below. Current consumption is averaged by the following equation CC(opr Measurement Circuit VIN PG 50 Ω ...

Page 41

... V). The internal circuitry has buffered outputs to ensure high noise immunity and output stability. Input voltage is allowed to be applied even if power voltage is not supplied because no diode is inserted between an input pin and V This allows for interfaces between power supplies of different voltage, output level conversion from and battery backup applications. ...

Page 42

... Board size : (2) Board name : JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Power Dissipation of Package (When Mounted on Board) Recommended Operating Conditions ...

Page 43

... I 1.5 OL  3.0 IH  1.5 OL  I =2 GND 3.6  GND 3.6  CC Seiko Instruments Inc. MINI LOGIC SERIES INVERTER S-75L04ANC °C Ta=25 Ta=- TYP. MAX. MIN. MAX.   0.75   1.05   2.10   0.25  0.45   0.90   ...

Page 44

... THL t PLH Propagation Delay Time t PHL Input Capacitance C IN Equiv. Int. Capacitance the no-load equivalent capacitance inside the circuitry. Refer to the measurement circuit shown *1. PD below. Current consumption is averaged by the following equation CC(opr Measurement Circuit VIN PG 50 Ω ...

Page 45

... CMOS low power consumption to achieve operation by only a couple of batteries ( V). The S-75LU04ANC is suitable for a wide variety of linear circuits. Input voltage is allowed to be applied even if power voltage is not supplied because no diode is inserted between an input pin and V This allows for interfaces between power supplies of different voltage, output level conversion from and battery backup applications ...

Page 46

... Board size : 114.3 mm × 76.2 mm × t1.6 mm (2) Board name : JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Power Dissipation of Package (When Mounted on Board) 46 ...

Page 47

... Rev.2.2 _00 Recommended Operating Conditions Parameter Power Voltage Input Voltage Output Voltage Input Rise and Fall Time DC Characteristics Parameter Symbol "H" level V IH Input Voltage "L" level "H" level V OH Output Voltage "L" level ...

Page 48

... Output Rise/Fall Time t THL t PLH Propagation Delay Time t PHL Input Capacitance C IN Equiv. Int. Capacitance the no-load equivalent capacitance inside the circuitry. Refer to the measurement circuit shown *1. PD below. Current consumption is averaged by the following equation CC(opr Measurement Circuit VIN PG 50 Ω ...

Page 49

... Logic Diagram The S-75L08ANC is a single 2-Input AND Gate fabricated by utilizing advanced silicon-gate CMOS technology which provides the inherent benefit of CMOS low power consumption to achieve operation by only a couple of batteries ( V). The internal circuitry has buffered outputs to ensure high noise immunity and output stability ...

Page 50

... Board name : JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Power Dissipation of Package (When Mounted on Board) 50 Taping only S-75L08ANC-5L2-TFG Symbol ...

Page 51

... I 1.5 OL  3 1.5  =2.6 mA 3.0  OL  GND 3.6 CC  GND 3.6 CC Seiko Instruments Inc. S-75L08ANC Standard Unit °C Ta=25 Ta=- TYP. MAX. MIN.   0.75   1.05  ...

Page 52

... MINI LOGIC SERIES 2 INPUT AND GATE S-75L08ANC AC Characteristics Parameter Output Rise/Fall Time t Propagation Delay Time t Parameter Symbol t TLH Output Rise/Fall Time t THL t PLH Propagation Delay Time t PHL Input Capacitance C IN Equiv. Int. Capacitance the no-load equivalent capacitance inside the circuitry. Refer to the measurement circuit shown *1 ...

Page 53

... V). The internal circuitry has buffered outputs to ensure high noise immunity and output stability. Input voltage is allowed to be applied even if power voltage is not supplied because no diode is inserted between an input pin and V This allows for interfaces between power supplies of different voltage, output level conversion from and battery backup applications ...

Page 54

... Board size : (2) Board name : JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Power Dissipation of Package (When Mounted on Board) 54 ...

Page 55

... Rev.2.2 _00 Recommended Operating Conditions Parameter Power Voltage Input Voltage Output Voltage Input Rise and Fall Time DC Characteristics Parameter Symbol "H" level V IH Input Voltage "L" level V IL "H" level Output Voltage "L" level ...

Page 56

... THL t PLH Propagation Delay Time t PHL Input Capacitance C IN Equiv.Int. Capacitance the no-load equivalent capacitance inside the circuitry. Refer to the measurement circuit shown *1. PD below. Current consumption is averaged by the following equation CC(opr Measurement Circuit VIN PG 50 Ω ...

Page 57

... V). The internal circuitry has buffered outputs to ensure high noise immunity and output stability. Input voltage is allowed to be applied even if power voltage is not supplied because no diode is inserted between an input pin and V This allows for interfaces between power supplies of different voltage, output level conversion from and battery backup applications ...

Page 58

... Board size : (2) Board name : JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Power Dissipation of Package (When Mounted on Board) 58 ...

Page 59

... "H" level Output Voltage "L" level Input Current Current Consump MINI LOGIC SERIES 2 INPUT OR GATE Symbol OUT 0 to 1000 (V dt/ 500 ( 400 (V Conditions V MIN. CC 1.0 0.75 1.5 1.05 3.0 2.10 1.0   1.5  ...

Page 60

... THL t PLH Propagation Delay Time t PHL Input Capacitance C IN Equiv. Int. Capacitance the no-load equivalent capacitance inside the circuitry. Refer to the measurement circuit shown *1. PD below. Current consumption is averaged by the following equation fin+I CC(opr Measurement Circuit VIN PG 50 Ω ...

Page 61

... V). The internal circuitry has buffered outputs to ensure high noise immunity and output stability. Input voltage is allowed to be applied even if power voltage is not supplied because no diode is inserted between an input pin and VCC. This allows for interfaces between power supplies of different voltage, output level conversion from and battery backup applications ...

Page 62

... Board size : (2) Board name : JEDEC STANDARD51-7 Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Power Dissipation of Package (When Mounted on Board) 62 ...

Page 63

... IN "H" level Output Voltage "L" level Input Current Current Consump MINI LOGIC SERIES EXCLUSIVE OR GATE Symbol OUT 0 to 1000 (V dt/ 500 ( 400 (V Conditions V MIN. CC 1.0 0.75 1.5 1.05 3.0 2.10  1.0  ...

Page 64

... THL t PLH Propagation Delay Time t PHL Input Capacitance C IN Equiv. Int. Capacitance the no-load equivalent capacitance inside the circuitry. Refer to the measurement circuit shown *1. PD below. Current consumption is averaged by the following equation CC(opr Measurement Circuit VIN PG 50 Ω ...

Page 65

...

Page 66

...

Page 67

...

Page 68

... Use of the information described herein for other purposes and/or reproduction or copying without the express permission of Seiko Instruments Inc. is strictly prohibited. The products described herein cannot be used as part of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc ...

Related keywords