at49bv3218 ATMEL Corporation, at49bv3218 Datasheet
at49bv3218
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at49bv3218 Summary of contents
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... I/O15 (Data Input/Output, Word Mode) A-1 (LSB Address Input, Byte Mode) BYTE Selects Byte or Word Mode NC No Connect 32-megabit (2M x 16/ 3-volt Only Flash Memory AT49BV3218 AT49BV3218T AT49LV3218 AT49LV3218T Not Recommended for New Designs. New Designs Should Use AT49BV/LV320(T)/321(T) Rev. 2452F–FLASH–10/02 1 ...
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... There is no reason to suspend the erase operation if the data to be read is in the other memory plane. The end of a program or an erase cycle is detected by the Ready/Busy pin, Data Polling or by the toggle bit. ...
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Block Diagram OUTPUT BUFFER INPUT A0 - A20 BUFFER ADDRESS LATCH Y-DECODER X-DECODER 2452F–FLASH–10/02 I/O0 - I/O15/A-1 INPUT BUFFER IDENTIFIER REGISTER STATUS REGISTER COMMAND REGISTER DATA COMPARATOR WRITE STATE MACHINE Y-GATING PLANE B SECTORS PLANE A SECTORS AT49BV/LV3218( ...
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... ERASURE: Before a byte/word can be reprogrammed, it must be erased. The erased state of memory bits is a logical “1”. The entire device can be erased by using the Chip Erase com- mand or individual sectors can be erased by using the Sector Erase command. ...
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... A20 - A19). The device also supports an erase sus- pend during a complete chip erase. While the chip erase is suspended, the user can read from any sector within the memory that is protected. The command sequence for a chip erase sus- pend and a sector erase suspend are the same. ...
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... TOGGLE BIT: In addition to Data Polling, the AT49BV/LV3218(T) provides another method for determining the end of a program or erase cycle. During a program or erase operation, successive attempts to read data from the same memory plane will result in I/O6 toggling between one and zero. Once the program cycle has completed, I/O6 will stop toggling and valid data will be read ...
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Command Definition in Hex 1st Bus Cycle Command Bus Sequence Cycles Addr Read 1 Addr Chip Erase 6 555 Sector Erase 6 555 Byte/Word Program 4 555 Enter Single Pulse 6 555 Program Mode Single Pulse 1 Addr Byte/Word Program ...
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Protection Register Addressing Table Word Use Block 0 Factory 1 Factory 2 Factory 3 Factory 4 User 5 User 6 User 7 User Note: 1. All address lines not specified in the above table must be 0 when accessing the ...
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AT49BV/LV3218 – Sector Address Table Plane Sector Size (Bytes/Words) A SA0 A SA1 A SA2 A SA3 A SA4 A SA5 A SA6 A SA7 A SA8 A SA9 A SA10 A SA11 A SA12 A SA13 A SA14 A ...
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AT49BV/LV3218 – Sector Address Table (Continued) Plane Sector Size (Bytes/Words) B SA37 B SA38 B SA39 B SA40 B SA41 B SA42 B SA43 B SA44 B SA45 B SA46 B SA47 B SA48 B SA49 B SA50 B SA51 ...
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AT49BV/LV3218T – Sector Address Table Plane Sector Size (Bytes/Words) B SA0 B SA1 B SA2 B SA3 B SA4 B SA5 B SA6 B SA7 B SA8 B SA9 B SA10 B SA11 B SA12 B SA13 B SA14 B ...
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AT49BV/LV3218T – Sector Address Table (Continued) Plane Sector Size (Bytes/Words) B SA37 B SA38 B SA39 B SA40 B SA41 B SA42 B SA43 B SA44 B SA45 B SA46 B SA47 A SA48 A SA49 A SA50 A SA51 ...
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DC and AC Operating Range Operating Temperature (Case) Ind. V Power Supply CC Operating Modes Mode CE Read V IL (2) Program/Erase V IL Standby/Program Inhibit Program Inhibit X Output Disable X Reset X Product Identification Hardware ...
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AC Read Characteristics Symbol Parameter t Address to Output Delay ACC ( Output Delay CE ( Output Delay OE (3)( Output Float DF Output Hold from OE ...
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Input Test Waveforms and Measurement Level < Output Test Load Pin Capacitance ( MHz 25°C Symbol Typ OUT Note: 1. This parameter is ...
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AC Byte/Word Load Characteristics Symbol Parameter Address, OE Setup Time AS OES t Address Hold Time AH t Chip Select Setup Time CS t Chip Select Hold Time CH t Write Pulse Width (WE or CE) WP ...
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Program Cycle Characteristics Symbol Parameter t Byte/Word Programming Time BP t Address Setup Time AS t Address Hold Time AH t Data Setup Time DS t Data Hold Time DH t Write Pulse Width WP t Write Pulse Width High ...
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Sector or Chip Erase Cycle Waveforms ( A20 555 WORD 0 Notes must be high only when WE and ...
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Data Polling Characteristics Symbol Parameter t Data Hold Time Hold Time OEH ( Output Delay OE t Write Recovery Time WR Notes: 1. These parameters are characterized and not 100% tested. 2. See t ...
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Software Product Identification (1) Entry LOAD DATA AA TO ADDRESS 555 LOAD DATA 55 TO ADDRESS AAA LOAD DATA 90 TO ADDRESS 555 ENTER PRODUCT IDENTIFICATION (2)(3)(5) MODE Software Product Identification (1)(6) Exit OR LOAD DATA AA TO ADDRESS 555 ...
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Status Bit Table Read Address In Plane A While Programming in Plane A I/O7 Programming in Plane B DATA Erasing in Plane A Erasing in Plane B DATA Erase Suspended & Read Erasing Sector Erase Suspended & Read DATA Non-erasing ...
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... AT49BV3218(T) Ordering Information I (mA ACC (ns) Active Standby 0.01 110 0.01 110 25 0.01 AT49LV3218(T) Ordering Information I (mA ACC (ns) Active Standby 0.01 48C16 48-ball, Plastic Chip-Size Ball Grid Array Package (CBGA) 48T 48-lead, Plastic Thin Small Outline Package (TSOP) ...
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Packaging Information 48C16 – CBGA A1 Ball ID D Top View 2.00 REF Ø Bottom View TITLE 2325 Orchard Parkway San Jose, CA 95131 R 2452F–FLASH–10/ ...
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TSOP Pin 1 Identifier e E Notes: 1. This package conforms to JEDEC reference MO-142, Variation DD. 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion 0.15 mm per side and on ...
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... Atmel Corporation 2002. Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein ...