hyb18t512160bf-5 Infineon Technologies Corporation, hyb18t512160bf-5 Datasheet - Page 45
hyb18t512160bf-5
Manufacturer Part Number
hyb18t512160bf-5
Description
240-pin Unbuffered Ddr2 Sdram Modules
Manufacturer
Infineon Technologies Corporation
Datasheet
1.HYB18T512160BF-5.pdf
(73 pages)
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3.4.2
The ODT function adds additional current consumption
to the DDR2 SDRAM when enabled by the EMRS(1).
Depending on address bits A[6,2] in the EMRS(1) a
“weak” or “strong” termination can be selected. The
Table 36
Parameter
Enabled ODT current per DQ
ODT is HIGH; Data Bus inputs are FLOATING
Active ODT current per DQ
ODT is HIGH; worst case of Data Bus inputs are
STABLE or SWITCHING.
Note: For power consumption calculations the ODT duty cycle has to be taken into account
Data Sheet
On Die Termination (ODT) Current
ODT current per terminated pin
Symbol Min.
I
I
ODTO
ODTT
45
current consumption for any terminated input pin,
depends on the input pin is in tri-state or driving 0 or 1,
as long a ODT is enabled during a given period of time.
5
2.5
7.5
10
5
15
HYS[64/72]T[16/32/64]0xxHU-[2.5/.../5]-A
Unbuffered DDR2 SDRAM Modules
Typ.
6
3
9
12
6
18
Max. Unit
7.5
3.75
11.25 mA/DQ A6 = 1, A2 = 1
15
7.5
22.5
mA/DQ A6 = 0, A2 = 1
mA/DQ A6 = 1, A2 = 0
mA/DQ A6 = 0, A2 = 1
mA/DQ A6 = 1, A2 = 0
mA/DQ A6 = 1, A2 = 0
Electrical Characteristics
02182004-DHQB-4RRW
EMRS(1) State
Rev. 1.3, 2005-09
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