m58bw32f STMicroelectronics, m58bw32f Datasheet - Page 41

• Manufacturer Part Number: m58bw32f
• Description: 16 Or 32 Mbit X32, Boot Block, Burst 3.3v Supply Flash Memories
• Manufacturer: STMicroelectronics

M58BW16F, M58BW32F
5
5.1
5.2
Status Register
The Status Register provides information on the current or previous Program, Erase or
Block Protect operation. The various bits in the Status Register convey information and
errors on the operation. They are output on DQ7-DQ0.
To read the Status Register the Read Status Register command can be issued. The Status
Register is automatically read after Program, Erase, Block Protect, Program/Erase Resume
commands. The Status Register can be read from any address.
The contents of the Status Register can be updated during an erase or program operation
by toggling the Output Enable or Output Disable pins or by de-activating (Chip Enable, V
and then reactivating (Chip Enable and Output Enable, V
device.
The Status Register bits are summarized in
in conjunction with the following text descriptions.
Program/Erase Controller Status (bit 7)
The Program/Erase Controller Status bit indicates whether the Program/Erase controller is
active or inactive. When the Program/Erase Controller Status bit is set to ‘0’, the
Program/Erase controller is active; when bit 7 is set to ‘1’, the Program/Erase controller is
inactive.
The Program/Erase Controller Status is set to ‘0’ immediately after a Program/Erase
Suspend command is issued until the Program/Erase Controller pauses. After the
Program/Erase Controller pauses the bit is set to ‘1’.
During Program and Erase operations the Program/Erase Controller Status bit can be polled
to find the end of the operation. The other bits in the Status Register should not be tested
until the Program/Erase controller completes the operation and the bit is set to ‘1’.
After the Program/Erase controller completes its operation the Erase Status (bit 5), Program
Status (bit 4) bits should be tested for errors.
Erase Suspend Status (bit 6)
The Erase Suspend Status bit indicates that an Erase operation has been suspended and is
waiting to be resumed. The Erase Suspend Status should only be considered valid when the
Program/Erase Controller Status bit is set to ‘1’ (Program/Erase controller inactive); after a
Program/Erase Suspend command is issued the memory may still complete the operation
rather than entering the Suspend mode.
When the Erase Suspend Status bit is set to ‘0’, the Program/Erase controller is active or
has completed its operation; when the bit is set to ‘1’, a Program/Erase Suspend command
has been issued and the memory is waiting for a Program/Erase Resume command.
When a Program/Erase Resume command is issued the Erase Suspend Status bit returns
to ‘0’.
Table 13: Status Register
IL
, and Output Disable, V
bits. Refer to
Status Register
IH
Table 13
.) the
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IH
)