lh5164a Sharp Microelectronics of the Americas, lh5164a Datasheet

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lh5164a

Manufacturer Part Number
lh5164a
Description
Manufacturer
Sharp Microelectronics of the Americas
Datasheet

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LH5164A/AH
FEATURES
DESCRIPTION
ess technology.
range from -40 to +85 C.
The LH5164A/AH are static RAMs organized as 8,192
The LH5164AH is designed for wide temperature
8 bits. It is fabricated using silicon-gate CMOS proc-
8,192
Access times: 80/100 ns (MAX.)
Low-power consumption:
Fully-static operation
Three-state outputs
Single +5 V power supply
TTL compatible I/O
Wide temperature range available
Packages:
Operating:
Standby:
LH5164A: -10 to +70 C
LH5164AH: -40 to +85 C
28-pin, 600-mil DIP
28-pin, 300-mil SK-DIP
28-pin, 450-mil SOP
28-pin, 8
303 mW (MAX.) LH5164A/D/N
248 mW (MAX.) LH5164A/D/N/T
275 mW (MAX.) LH5164AH/HD/HN/HT
LH5164A/D/N/T: 5.5 W (MAX.)
LH5164AH/HD/HN/HT:
@ 80 ns
@ 100 ns
@ 100 ns
T
T
A
A
8 bit organization
85 C: 16.5 W (MAX.)
70 C: 5.5 W (MAX.)
13 mm
2
TSOP (Type I)
PIN CONNECTIONS
28-PIN TSOP (Type I)
28-PIN DIP
28-PIN SK-DIP
28-PIN SOP
Figure 2. Pin Connections for TSOP Package
Figure 1. Pin Connections for DIP, SK-DIP,
CE
WE
V
NC
A
A
OE
A
A
A
A
A
A
A
CC
12
11
9
8
2
7
6
5
4
3
CMOS 64K (8K
10
12
13
14
11
2
3
4
5
6
7
8
9
1
GND
I/O
I/O
I/O
A
NC
A
A
A
A
A
A
A
A
and SOP Packages
12
3
3
7
6
5
4
2
1
0
1
2
10
12
13
14
11
2
3
4
5
6
7
8
9
1
27
17
28
26
25
24
23
22
21
20
19
18
16
15
8) Static RAM
CE
A
A
A
OE
I/O
I/O
I/O
I/O
V
WE
A
CE
I/O
8
9
11
CC
10
7
6
5
4
8
2
1
17
16
15
28
27
26
25
24
23
22
20
19
18
21
TOP VIEW
TOP VIEW
I/O
I/O
I/O
CE
I/O
I/O
I/O
I/O
GND
I/O
A
A
A
A
5164A-1
5164A-8
10
0
1
2
3
2
8
7
6
5
1
4
1
1

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lh5164a Summary of contents

Page 1

... SK-DIP 28-pin, 450-mil SOP 2 28-pin TSOP (Type I) DESCRIPTION The LH5164A/AH are static RAMs organized as 8,192 8 bits fabricated using silicon-gate CMOS proc- ess technology. The LH5164AH is designed for wide temperature range from -40 to +85 C. CMOS 64K (8K PIN CONNECTIONS ...

Page 2

... H H NOTE MEMORY ARRAY (256 x 256) I/O CIRCUITS COLUMN DECODERS COLUMN ADDRESS BUFFER Figure 3. LH5164A/AH Block Diagram SIGNAL I GND NC MODE I/O - I/O SUPPLY CURRENT 1 8 Deselect High-Z Deselect High-Z Write D IN Read D OUT ...

Page 3

... SYMBOL Input leakage current I LI Output leakage I LO current Operating current I CC Standby current I SB1 V OL Output voltage V OH NOTES - (LH5164A/AD/AN/AT LH5164A/AD/AN/AT 3. LH5164AH/AHD/AHN/AHT 4. CE should be V – 0 0.2 V when 100 ns RATING RATING -0.3 to +7.0 -0.3 to +7.0 -0 0.3 -0 0.3 ...

Page 4

... Data hold time Output active from end of write WE to output in High output in High-Z NOTES -10 to +70 C (LH5164A/AD/AN/AT Active output to high-impedance and high-impedance to output active tests specified for a 200 mV transition from steady state levels into the test load. AC TEST CONDITIONS PARAMETER ...

Page 5

... This parameter is sampled and not production tested. DATA RETENTION CHARACTERISTICS PARAMETER SYMBOL Data retention voltage V Data retention current I Chip disable to data retention Recovery time NOTES -10 to +70 C (LH5164A/AD/AN/AT should 0 0.2 V when CE 2 CCDR 3. LH5164A/AD/AN/AT 4. LH5164AH/AHD/AHN/AHT Read cycle time ...

Page 6

... LH5164A/AH CE CONTROL (NOTE 4 CCDR CONTROL 4 CCDR 0 NOTE: To control data hold fix the input level during the data retention mode I NOTE 'HIGH.' 6 DATA RETENTION MODE CDR ...

Page 7

... While I/O pins are in the output state, input signals with the opposite logic level must not be applied (NOTE (NOTE (NOTE 1) (NOTE 3) t OHZ HIGH DATA VALID = 'LOW 'HIGH,' and WE = 'LOW LOW transition Figure 6. Write Cycle 1 LH5164A/ HIGH transition, 2 5164A-4 7 ...

Page 8

... LH5164A/ (NOTE 5) D OUT (NOTE 'LOW' NOTES: 1. The writing occurs during an overlapping period defined as the time from the last occuring transition, either the time when the writing is finished defined as the time from address change to writing start. ...

Page 9

... MINIMUM LIMIT 15 13.45 [0.530] 12.95 [0.510] 14 0.30 [0.012] 0.20 [0.008] 4.50 [0.177] 4.00 [0.157] 5.20 [0.205] 5.00 [0.197] 3.50 [0.138] 3.00 [0.118] 0.51 [0.020] MIN. 28-pin, 600-mil DIP 15 7.05 [0.278] 6.65 [0.262] 14 0.35 [0.014] 0.15 [0.006] 3.65 [0.144] 3.25 [0.128] 4.40 [0.173] 4.00 [0.157] 3.40 [0.134] 3.00 [0.118] 0.51 [0.02] MIN. 28-pin, 300-mil SK-DIP LH5164A/AH DETAIL 15.24 [0.600] TYP. 28DIP-2 DETAIL 7.62 [0.300] TYP. 28DIP-6 9 ...

Page 10

... LH5164A/AH 28SOP (SOP028-P-0450) 1.27 [0.050] TYP. 0.50 [0.020] 0.30 [0.012 18.20 [0.717] 17.80 [0.701] MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT 10 1.70 [0.067] 15 8.80 [0.346] 12.40 [0.488] 8.40 [0.331] 11.60 [0.457] 14 1.70 [0.067] 0.15 [0.006] 1.025 [0.040] 2.40 [0.094] 2.00 [0.079] 0.20 [0.008] 0.00 [0.000] 1.025 [0.040] 28-pin, 450-mil SOP CMOS 64K (8K 8) Static RAM 10 ...

Page 11

... MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT ORDERING INFORMATION LH5164A X X Device Type Operating Package Temperature Example: LH5164AD-10L (CMOS 64K ( Static RAM, 100 ns, Low-power standby, 28-pin, 300-mil SK-DIP) 15 12.00 [0.472] 13.70 [0.539] 11.60 [0.457] 13.10 [0.516] 14 0.15 [0.006] 1.10 [0.043] 0.90 [0.035] 1.20 [0.047] MAX. 0.425 [0.017] ...

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