hm62w16256b Renesas Electronics Corporation., hm62w16256b Datasheet

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hm62w16256b

Manufacturer Part Number
hm62w16256b
Description
4 M Sram 256-kword X 16-bit - Hitachi Semiconductor
Manufacturer
Renesas Electronics Corporation.
Datasheet
Description
The Hitachi HM62W16256B Series is 4-Mbit static RAM organized 262,144-word
Series has realized higher density, higher performance and low power consumption by employing Hi-CMOS
process technology. It offers low power standby power dissipation; therefore, it is suitable for battery backup
systems. It is packaged in standard 44-pin plastic TSOPII.
Features
Single 3.3 V supply: 3.3 V ± 0.3 V
Fast access time: 55 ns/70 ns (max)
Power dissipation:
Completely static memory.
Equal access and cycle times
Common data input and output.
Battery backup operation.
Active: 9.9 mW (typ)
Standby: 3.3 µW (typ)
No clock or timing strobe required
Three state output
2 chip selection for battery backup
HM62W16256B Series
4 M SRAM (256-kword
16-bit)
16-bit. HM62W16256B
ADE-203-934C (Z)
Oct. 14, 1999
Rev. 2.0

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hm62w16256b Summary of contents

Page 1

... HM62W16256B Series 4 M SRAM (256-kword Description The Hitachi HM62W16256B Series is 4-Mbit static RAM organized 262,144-word Series has realized higher density, higher performance and low power consumption by employing Hi-CMOS process technology. It offers low power standby power dissipation; therefore suitable for battery backup systems ...

Page 2

... HM62W16256B Series Ordering Information Type No. Access time HM62W16256BLTT HM62W16256BLTT HM62W16256BLTT-5SL 55 ns HM62W16256BLTT-7SL Package 400-mil 44-pin plastic TSOPII (normal-bend type) (TTP-44DB) ...

Page 3

... A0 LB CS1 I/O15 I/ I/O14 I/ I/O2 I/O13 10 I/O3 35 I/O12 I/O4 I/O11 14 31 I/O10 I/ I/O9 I/ I/O8 I/ CS2 A17 A16 20 25 A15 A10 21 A14 24 A11 22 23 A12 A13 (Top view) HM62W16256B Series 3 ...

Page 4

... HM62W16256B Series Block Diagram LSB A4 A3 A15 A14 A16 A1 A2 A17 A0 MSB A13 I/O0 I/O15 CS2 CS1 • • • Memory matrix Row • • 2,048 x 2,048 decoder • Column I/O • Input Column decoder data control LSB A10 • ...

Page 5

... Tbias –10 to +85 30 ns. Min Typ 3.0 3 2.0 — IH –0.3 — — 30 ns. HM62W16256B Series Operation Standby Standby Standby Read Lower byte read Upper byte read write Lower byte write Upper byte write Output disable Unit 0. ...

Page 6

... HM62W16256B Series DC Characteristics Parameter Symbol Min Input leakage current | Output leakage current | Operating current I CC Average HM62W16256B-5 I CC1 operating current HM62W16256B-7 I CC1 I CC2 Standby current Standby current I * SB1 SB1 Output high voltage V OH Output low voltage V OL Notes: 1 ...

Page 7

... Test Conditions • Input pulse levels 0 • Input rise and fall time • Input timing reference levels: 1.4 V • Output timing reference levels: 1.4 V/1.4 V (HM62W16256B-5) : 2.0 V/0.8 V (HM62W16256B-7) • Output load (Including scope and jig) Read Cycle Parameter Read cycle time Address access time ...

Page 8

... HM62W16256B Series Write Cycle Parameter Write cycle time Address valid to end of write Chip selection to end of write Write pulse width LB, UB valid to end of write Address setup time Write recovery time Data to write time overlap Data hold from write time Output active from end of write ...

Page 9

... Read Cycle Address CS1 CS2 LB High impedance Dout t RC Valid address ACS1 CLZ1 t ACS2 CLZ2 BLZ OLZ HM62W16256B Series CHZ1 CHZ2 BHZ OHZ t OH Valid data 9 ...

Page 10

... HM62W16256B Series Write Cycle (1) (WE Clock) Address CS1 CS2 LB Din Dout Valid address WHZ * High impedance Valid data ...

Page 11

... Write Cycle (2) (CS Clock Address t AS CS1 CS2 LB Din Dout ) Valid address High impedance HM62W16256B Series Valid data 11 ...

Page 12

... HM62W16256B Series Write Cycle (3) (LB, UB Clock Address CS1 CS2 Din Dout Valid address High impedance Valid data ...

Page 13

... Min Typ* Max 2.0 — — 1 — 0 — 0 — — — — 3 +25˚C and not guaranteed. HM62W16256B Series 3 Unit Test conditions* V Vin 0V ( CS2 0 (2) CS2 V – 0 CS1 V – – 0 CS2 V – ...

Page 14

... HM62W16256B Series Low V Data Retention Timing Waveform (1) (CS1 Controlled CDR 2.0 V CS1 0 V Low V Data Retention Timing Waveform (2) (CS2 Controlled CDR V CC 3.0 V CS2 Data Retention Timing Waveform (3) (LB, UB Controlled) Low CDR 2.0 V LB, UB ...

Page 15

... Package Dimensions HM62W16256BLTT Series (TTP-44DB) 18.41 18.81 Max 44 1 0.80 *0.30 0.10 0.13 M 0.25 0.05 1.005 Max 0.10 *Dimension including the plating thickness Base material dimension 23 22 11.76 0.20 Hitachi Code JEDEC EIAJ Weight (reference value) HM62W16256B Series Unit: mm 0.80 0 – 5 0.50 0.10 TTP-44DB — — 0. ...

Page 16

... HM62W16256B Series Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document ...

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