at18f002 ATMEL Corporation, at18f002 Datasheet
at18f002
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at18f002 Summary of contents
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... FPGA devices. The AT18F Series Configurators can be programmed with Atmel or industry-standard, third-party, stand-alone programmers such as BP, Data I/O, Hi-Lo, etc. AT18F002 AT18F040 AT18F080 2 Mbit 4 Mbit Yes 3.3V 1.8-3.3V 1.8-3.3V 33 MHz 20-lead TSSOP Yes FPGA Configuration Flash Memory AT18F010 AT18F002 AT18F040 AT18F080 Preliminary 7 Mbit 3672A–CNFG–1/08 ...
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Pin Configuration 3. Block Diagram Power-on Reset Internal Oscillator Flash Memory AT18F010/002/040/080 [Preliminary] 2 20-lead TSSOP DATA CLK 3 18 TDI 4 17 TMS 5 16 TCK RESET/OE 8 ...
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Device Description The download interface of the configuration memory will directly communicate with the FPGA through the interface-control signals (CLK, RESET/OE, CE) to initialize and terminate configura- tion. All FPGA devices in the master serial mode can control the ...
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... AT18F series devices are compatible with a portion of the Xilinx’s FGPA device families. Table 4-1. Atmel AT18F010-30XU AT18F002-30XU AT18F010/002/040/080 [Preliminary] 4 AT18F Series Configurator Compatibility with Xilinx FPGAs Xilinx XC2V40 Virtex-II XC2V80 XCV50E Virtex-E XCV100E XCV50 Virtex XCV100 XCV150 Spartan-3E XC3S100E XC3S50 Spartan-3 ...
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Programming AT18Fxx devices are in-system programmable (ISP) devices utilizing the 4-pin JTAG protocol. This capability eliminates package handling normally required for programming and facilitates rapid design iterations and field changes. Atmel provides ISP hardware and software to allow programming ...
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Pin Description Table 6-1. Name DATA CLK RESET/ CEO TMS TCK TDI TDO VCCINT NC VCCO GND VCCJ 6.1 DATA (D0) Open-collector bi-directional data pin. This pin has an internal 20 KΩ pull-up resistor. 6.2 CLK Clock ...
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CEO Chip Enable Output for configuration download. This output goes Low when the internal address counter of the device has reached its maximum value which signals that all configuration data is being clocked out of the device ...
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Configuration Memory to FPGA Device Interface Connection Diagrams Figure 8-1. General Connection Diagram for Loading FPGA from Configurator and JTAG Signals Notes: 1. Signals within parenthesis will be applied to Atmel AT40AK FPGA. 2. For details of the circuit ...
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Absolute Maximum Ratings* Operating Temperature................................. -55° +125° C Storage Temperature .................................... -65 ° +150° C Voltage on Any Pin with Respect to Ground ..............................-0. Supply Voltage (V ) .........................................-0.5V to +3.6V CC Maximum ...
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DC Characteristics Symbol Description I Internal Voltage Supply Current, Active Mode CCINT I I/O Drive Supply Current, Active Mode CCIO I JTAG Supply Current, Active Mode CCJ I Internal Voltage Supply Current, Standby Mode CCINTS I Output Drive Supply ...
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AC Characteristics Figure 12-1. AT18Fxx as Configuration Slave with CLK Input Pin as Clock Source CE T SCE RESET/OE CLK DATA Table 12-1. AC Characteristics over Operating Conditions Symbol Description T CF ...
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Figure 12-2. AC Characteristics when Cascading RESET/OE CE CLK DATA LAST BIT CEO Table 12-2. AC Characteristics When Cascading Symbol Description T CLK to Output Float Delay CDF T CLK to CEO Delay OCK CEO Delay OCE ...
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... Wide, Plastic Think-Shrink Small Outline (TSSOP) 3672A–CNFG–1/08 AT18F010/002/040/080 [Preliminary] Ordering Code AT18F010-30XU 20A2 - 20 TSSOP AT18F002-30XU 20A2 - 20 TSSOP AT18F040-30XU 20A2 - 20 TSSOP AT18F080-30XU 20A2 - 20 TSSOP Package Type Package Operation Range Industrial (-40° 85° C) Industrial (-40° ...
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Packaging Information 14.1 20A2 – TSSOP b Marked Pin1 Indentifier Top View e 0.10 mm TYP Top View Side View e1 Bottom View Notes: 1. This drawing is for general ...
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Revision History Revision Level – Release Date A – January 2008 3672A–CNFG–1/08 AT18F010/002/040/080 [Preliminary] History Initial release. 15 ...
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... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © Atmel Corporation 2008. All rights reserved. Atmel marks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. International Atmel Asia ...