viper100bsp STMicroelectronics, viper100bsp Datasheet - Page 14

• Manufacturer Part Number: viper100bsp
• Description: Smps Primary I.c.
• Manufacturer: STMicroelectronics

VIPER100B/BSP
used. It mixes a high performance compensation
network together with a separate high value soft
start capacitor. Both soft start time and regulation
loop bandwidth can be adjusted separately.
If the device is intentionally shut down by putting
the COMP pin to ground, the device is also
performing start-up cycles, and the V
oscillating between V
can be used for supplying external functions,
provided that their consumption doesn’t exceed
0.5mA. Figure 17 shows a typical application of
this function, with a latched shut down. Once the
”Shutdown” signal has been activated, the device
remains in the off state until the input voltage is
removed.
TRANSCONDUCTANCE ERROR AMPLIFIER
The VIPer100B/BSP includes a transconductance
error amplifier. Transconductance Gm is the
change in output current (I
in input voltage (V
G
The output impedance Z
amplifier (COMP pin) can be defined as:
Z
This last equation shows that the open loop gain
A
A
where G
typically.
14/20
Figure 16: Mixed Soft Start and Compensation
COMP
VOL
VOL
m
+ C3
can be related to G
= G
OSC
I
COMP
V
m
m
DD
13V
VDD
V
value for VIPer100B/BSP is 1.5 mA/V
I
x Z
COMP
COMP
C4
+
-
COMP
VIPer100B
COMP SOURCE
DD
C1
G
). Thus:
1
DDon
R1
m
DRAIN
x
COMP
m
and V
and Z
D1
V
COMP
V
COMP
+ C2
at the output of this
DD
DDoff
COMP
) versus change
FC0 013 1B
R3
R2
. This voltage
D2
D3
DD
:
voltage is
AUXILIARY
WINDING
G
and therefore A
tolerances. An impedance Z can be connected
between the COMP pin and ground in order to
define more accurately the transfer function F of
the error amplifier, according to the following
equation, very similar to the one above:
F
The error amplifier frequency response is
reported in figure 10 for different values of a
simple resistance connected on the COMP pin.
The unloaded transconductance error amplifier
shows an internal Z
complex impedance can be connected on the
COMP pin to achieve different compensation
laws. A capacitor will provide an integrator
function, thus eliminating the DC static error, and
a resistance in series leads to a flat gain at higher
frequency, insuring a correct phase margin. This
configuration is illustrated on figure 18.
As shown in figure 18 an additional noise filtering
capacitor of 2.2 nF is generally needed to avoid
any high frequency interference.
It can be also interesting to implement a slope
compensation when working in continuous mode
with duty cycle higher than 50%. Figure 19 shows
such a configuration. Note that R1 and C2 build
the classical compensation network, and Q1 is
injecting the slope compensation with the correct
polarity from the oscillator sawtooth.
EXTERNAL CLOCK SYNCHRONIZATION:
The
capability, when connected to an external
Figure 17: Latched Shut Down
(S)
m
Shutdo wn
is well defined by specification, but Z
= Gm x Z(S)
OSC
R 4
pin
Q 2
R 3
VOL
provides a
COMP
R2
Q1
R1
are subject to
of about 330 K . More
OSC
13V
VDD
D1
synchronisation
+
-
VIPer100B
FC00110B
COMP SOURCE
DRAIN
COMP
large