s-8209a Seiko Instruments Inc., s-8209a Datasheet - Page 10

• Manufacturer Part Number: s-8209a
• Description: Battery Protection Ic With Cell-balance Function
• Manufacturer: Seiko Instruments Inc.

10
BATTERY PROTECTION IC WITH CELL-BALANCE FUNCTION
S-8209A Series
1. Normal Status
2. Overcharge Status
3. Overdischarge Status
4. Cell-balance Function
5. Delay Circuit
In the S-8209A Series, both of CO and DO pin get the V
than the overdischarge detection voltage (V
respectively, the CTLC pin input voltage (V
(V
In the S-8209A Series, the CO pin is in high impedance; when V
This is the overcharge status.
If V
S-8209A Series releases the overcharge status to return to the normal status.
In the S-8209A Series, the DO pin is in high impedance; when V
This is the overdischarge status.
If V
the S-8209A Series releases the overdischarge status to return to the normal status.
In the S-8209A Series, the CB pin gets the level of VDD pin; when V
or more. This is the charge cell-balance function.
If V
pin.
In addition, the CB pin gets the level of VDD pin; when V
discharge cell-balance function.
If V
In the S-8209A Series, users are able to set delay time which is from detection of changes in V
output to the CO, DO, CB pin.
For example in the detection of overcharge status, when V
C
CO pin is in high impedance. The output pin delay time t
The electric charge in C
The delay time that users have set for the CO pin, as seen above, is settable for each output pin DO, CB.
CDT
CTLD
CTLD
DS
DS
DS
starts via R
) < the CTLD pin voltage “H” (V
gets the overcharge release voltage (V
gets the overdischarge release voltage (V
gets the cell-balance release voltage (V
t
D
gets V
[s] = 10.0 MΩ (Typ.) × C
CTLDL
CDT
or less, or V
. If the voltage between CDT and VSS (V
CDT
starts to be discharged when the delay time has finished.
DS
CDT
is V
[µF]
CTLDH
DL
or less again, the S-8209A Series sets the CB pin the level of VSS.
). This is the normal status.
Seiko Instruments Inc.
CTLC
CL
BL
DL
) or less, and V
DU
) or less again, the S-8209A Series sets the CB pin the level of VSS
) < the CTLC pin voltage “H” (V
), and is less than the overcharge detection voltage (V
) or more, and V
D
DS
is calculated by the following formula.
SS
DS
is more than V
level; the voltage between VDD and VSS (V
CDT
exceeds V
CTLC
) reaches the CDT pin detection voltage (V
DS
DS
CTLD
gets the CTLC pin voltage “L” (V
gets V
gets V
DS
gets the CTLD pin voltage “L” (V
CU
gets the cell-balance detection voltage (V
DL
, or V
CU
DL
, and V
or more, or V
or less, or V
CTLC
CTLCH
CTLD
gets V
), the CTLD pin input voltage
is V
CTLCH
CTLD
CTLC
CTLDH
gets V
gets V
or more, charging to
or more. This is the
DS
CTLCL
, V
Rev.1.0
CTLDH
CTLCH
CTLC
CTLDL
) or less, the
DS
, V
CDET
) is more
) or less,
or more.
or more.
CU
CTLD
) and
), the
_00
BU
to
)