t6816-tiq ATMEL Corporation, t6816-tiq Datasheet - Page 4

• Manufacturer Part Number: t6816-tiq
• Description: 40-v Dual Hex Output Driver With Serial Input Control
• Manufacturer: ATMEL Corporation

Functional Description
Serial Interface
Figure 3. Data Transfer Input Data Protocol
4
CS
DI
CLK
DO
T6816
TP
0
SRR
SLS1
1
LS1
SHS1
2
HS1
Data transfer starts with the falling edge of the CS signal. Data must appear at DI syn-
chronized to CLK and are accepted on the falling edge of the CLK signal. LSB (bit 0,
SRR) has to be transferred first. Execution of new input data is enabled on the rising
edge of the CS signal. When CS is high, Pin DO is in tri-state condition. This output is
enabled on the falling edge of CS. Output data will change their state with the rising
edge of CLK and stay stable until the next rising edge of CLK appears. LSB (bit 0, TP) is
transferred first.
Table 1. Input Data Protocol
SLS2
3
LS2
Bit
10
11
12
0
1
2
3
4
5
6
7
8
9
SHS2
4
HS2
Input Register
SLS3
5
LS3
SRR
HS1
HS2
HS3
HS4
HS5
HS6
LS1
LS2
LS3
LS4
LS5
LS6
SHS3
6
HS3
SLS4
7
LS4
Function
Status register reset (high = reset; the bits PSF, SCD and
overtemperature shutdown in the output data register are set to
low)
Controls output LS1 (high = switch output LS1 on)
Controls output HS1 (high = switch output HS1 on)
See LS1
See HS1
See LS1
See HS1
See LS1
See HS1
See LS1
See HS1
See LS1
See HS1
SHS4
8
HS4
SLS5
9
LS5
SHS5
10
HS5
11
SLS6
LS6
SHS6
12
HS6
13
SCD
OLD
SCT
14
INH
15
SI
PSF
4595B–BCD–05/03