ncv8612b ON Semiconductor, ncv8612b Datasheet - Page 12

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ncv8612b

Manufacturer Part Number
ncv8612b
Description
Ncv8612b Ultra-low Iq Automotive System Power Supply Ic Power Saving Triple-output Linear Regulator
Manufacturer
ON Semiconductor
Datasheet
pull output stage, with V
of the part shutting down via Battery voltage or Enable, the
Reset output will be pulled to ground.
Output and the relative timing are illustrated in Figure 5,
Reset Timing. Output voltage regulation must be maintained
for the delay time before the reset output signals a valid
condition. The delay for the reset output is defined as the
amount of time it takes the timing capacitor on the delay pin
to charge from a residual voltage of 0 V to the Delay timing
threshold voltage V
I
capacitor on the Delay Pin, the following time delay is
derived:
t
t
capacitor value. The Delay Time can be reduced by
decreasing the capacitance of C
delay can be reduced as desired. Leaving the Delay Pin open
is not desirable as it can result in unwanted signals being
coupled onto the pin.
VBATT_MON and Warning Flags
Detection, Brown Out Detection, and High Temperature
Detection circuitry. The Overvoltage Shutdown, High
Voltage, and Brown Out Detection circuitry are all run off
the VBATT_MON input. If this functionality is not desired,
grounding of the VBATT_MON pin will turn off the
functions.
impedance state until the VBATT_MON circuitry reaches it
minimum operating voltage, typically 1.0 V to 2.5 V. At that
point the BO_DET signal will be held low, while the
HV_DET signal will go high. The BO_DET signal will go
high once the VBATT_MON signal reaches the Brown Out
Threshold, typically 7 V to 8 V. The BO_DET signal will
stay high until the VBATT_MON voltage drops below the
Brown Out Threshold. The HV_DET signal will stay high
RD
RD
D
The input and output conditions that control the Reset
Other time delays can be obtained by changing the C
The NCV8612B is equipped with High Voltage
The HV_DET and BO_DET signals are in a high
of 5 mA. By using typical IC parameters with a 10 nF
= C
= 10 nF * (2 V)/ (5 mA) = 4 ms
D
* V
DU
/ I
D
D
of 2 V. The charging current for this is
PP
as the high signal. In the event
D
. Using the formula above,
http://onsemi.com
D
12
until the VBATT_MON voltage rises above the HV_DET
threshold, typically 18 V to 20 V. The HV_DET signal will
reassert high once the HV_DET signal crosses the HV_DET
threshold going low.
which indicates when the junction temperature is
approaching thermal shutdown. The Hot Flag signal will
remain high as long as the junction temperature is below the
Hot flag threshold, typically 140°C to 160°C. This pin is
intended as a warning that the junction temperature is
approaching the Thermal Shutdown threshold, which is
typically 160°C to 180°C. The Hot Flag signal will remain
low until the junction temperature drops below the Hot Flag
threshold.
VBATT_MON Pin, and can not be disabled by grounding
VBATT_MON.
output stage. The high signal is provided by V
internally tied to V
Overvoltage Shutdown
(OVS) functionality. The OVS is designed to turn on when
the
VBATT_MON pin is tied to ground, the OVS functionality
will be disabled.
shut down. LDO3 is run off a separate input voltage line,
VIN_S3, and will not shutdown in this condition. Once the
OVS condition has passed, LDO1 and LDO2 will both turn
back on.
prevent a continued OVS condition on the chip once the high
battery condition has subsided. This transistor is needed to
discharge the high voltage from the VIN−H hold−up
capacitor. This transistor will only turn on when an OVS is
detected on−chip, and will turn off as soon as the OVS
condition is no longer detected by the chip.
The NCV8612B is also equipped with a Hot Flag pin
The Hot_Flag circuitry does not run off the
Each of the three warning circuits utilizes a push−pull
The NCV8612B is equipped with overvoltage shutdown
When OVS is triggered, LDO1 and LDO2 will both be
The VIN−H line is equipped with a bleed transistor to
VBATT_MON signal crosses 19 V.
OUT1
PP
. V
If
PP
the
is

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