tmp86c408idmg TOSHIBA Semiconductor CORPORATION, tmp86c408idmg Datasheet - Page 61
tmp86c408idmg
Manufacturer Part Number
tmp86c408idmg
Description
Cmos 8-bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP86C408IDMG.pdf
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5.4 P3 (P37 to P30) Port
input, key-on wakeup input, and 8-bit timer counter input/output. The P3 Port Input/output Control Register (P3CR)
and ADCCR1<AINDS> are used to specify this port for input or output. When reset, the P3CR register and P3DR
are cleared to 0, while AINDS is set to 1, so that P37 to P30 function as input port.
analog input no matter what values are set in the P3DR and P3CR. When using the P3 port as an output port, set the
P3CR to 1 and the pin associated with that bit is set for output mode, so that P3DR (output latch data) is output from
that pin.
input read in the P3DR value into the internal circuit and those not selected for analog input read in a 1 or 0 accord-
ing to the logic level on each pin. Even when an output instruction is executed, no latch data are forwarded to the
pins selected for analog input.
sion, however, avoid executing output instructions on these ports, because this is necessary to maintain the accuracy
of conversion. Also, during AD conversion, take care not to enter a rapidly changing signal to any port adjacent to
analog input.
The P3 port is an 8-bit input/output port that can be specified for input or output bitwise, and is shared with analog
When using the P3 port as an input port, set AINDS = 1 while at the same time setting the P3CR register to 0.
When using the P3 port for analog input, set AINDS = 0 and the pins selected with ADCCR1<SAIN > are set for
When an input instruction is executed for the P3 port while using the AD converter, the pins selected for analog
Any pins of the P3 port which are not used for analog input can be used as input/output ports. During AD conver-
Data output (P3DR)
Data output (P3DR)
Data input (P3DR)
Data input (P3DR)
Key-on wakeup
Control output
Control input
Analog input
P3CRi input
P3CRi input
STOPnEN
OUTEN
OUTEN
AINDS
P3CRi
P3CRi
STOP
STOP
SAIN
a) Equivalent circuit of P32 to P37
b) Equivalent circuit of P30, P31
Output latch
Output latch
Output latch
Output latch
D
D
D
D
Figure 5-5 P3 Port
Q
Q
Q
Q
Page 51
Note 1: i = 7
Note 2: n = 7
Note 3: Functions enclosed
with broken lines do
not apply to
P32 and P33.
P3i
P3i
Note: i = 1
to
to
2
4
to
0
TMP86C408IDMG
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