tmp88ps42ng TOSHIBA Semiconductor CORPORATION, tmp88ps42ng Datasheet - Page 189
tmp88ps42ng
Manufacturer Part Number
tmp88ps42ng
Description
8 Bit Microcontroller Tlcs-870/x Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP88PS42NG.pdf
(226 pages)
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SIOCR1<SIOS>
SIOSR<SIOF>
SIOSR<SEF>
INTSIO interrupt
SIOCR1<SIOS>
SIOSR<SIOF>
SIOSR<SIOF>
SIOSR<SEF>
SCK pin
(Output)
SO pin
INTSIO interrupt
DBR
SCK pin
(Input)
SO pin
DBR
Figure 15-8 Transfer Mode (Example: 8bit, 1word transfer, External clock)
That the transmission has ended can be determined from the status of SIOSR<SIOF> because SIOSR<SIOF>
is cleared to “0” when a transfer is completed.
“0”.
data; If SIOCR1<SIOS> is not cleared before shift out, dummy data will be transmitted and the operation will
end.
SIOCR2<BUF> must be rewritten after confirming that SIOSR<SIOF> has been cleared to “0”.
Figure 15-7 Transfer Mode (Example: 8bit, 1word transfer, Internal clock)
SIOCR1<SIOS> is cleared, the operation will end after all bits of words are transmitted.
When SIOCR1<SIOINH> is set, the transmission is immediately ended and SIOSR<SIOF> is cleared to
When an external clock is used, it is also necessary to clear SIOCR1<SIOS> to “0” before shifting the next
If it is necessary to change the number of words, SIOCR1<SIOS> should be cleared to “0”, then
Write
Write
(a)
(a)
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Write
Write
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Page 179
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b
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0
0
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Clear SIOS
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Clear SIOS
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TMP88PS42NG
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