tmp88ps42ng TOSHIBA Semiconductor CORPORATION, tmp88ps42ng Datasheet - Page 44
tmp88ps42ng
Manufacturer Part Number
tmp88ps42ng
Description
8 Bit Microcontroller Tlcs-870/x Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP88PS42NG.pdf
(226 pages)
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3. Interrupt Control Circuit
3.4 Software Interrupt (INTSW)
3.4 Software Interrupt (INTSW)
3.4.1 Address error detection
3.4.2 Debugging
is highest prioritized interrupt). However, if processing of a non-maskable inerrupt is already underway, executing
the SWI instruction will not generate a software interrupt but will result in the same operation as the NOP instruc-
tion.
Executing the SWI instruction generates a software interrupt and immediately starts interrupt processing (INTSW
Use the SWI instruction only for detection of the address error or for debugging.
memory address during single chip mode. Code FFH is the SWI instruction, so a software interrupt is gener-
ated and an address error is detected. The address error detection range can be further expanded by writing
FFH to unused areas of the program memory. Address trap reset is generated in case that an instruction is
fetched from RAM, DBR or SFR areas.
address.
FFH is read if for some cause such as noise the CPU attempts to fetch an instruction from a non-existent
Debugging efficiency can be increased by placing the SWI instruction at the software break point setting
Page 34
TMP88PS42NG
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