tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 26
tmp89fm42
Manufacturer Part Number
tmp89fm42
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP89FM42.pdf
(408 pages)
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2.2 Memory space
2. CPU Core
RA001
Flash memory control register 2
2.2.2 Data area
(0x0FD1)
FLSCR2
2.2.1.3
Note: Only the first 2 Kbytes of the BOOTROM are mapped in the memory map, except in the serial PROM mode.
tions.
The data area stores the data to be accessed as sources and destinations of transfer and calculation instruc-
The SFR, the RAM, the BOOTROM and the FLASH are mapped in the data area.
Read/Write
Bit Symbol
CR1EN
After reset
Flash
The Flash is mapped to 0x8000 to 0xFFFF in the code area after reset release.
FLSCR1 register
enable/disable control
Figure 2-2 Memory Map in the Data Area
7
*
0x0EFF
0xFFFF
0x0E40
0x0FFF
0x17FF
0x7FFF
0x003F
0x083F
0x0F00
0x0000
0x0040
0x1000
0x1800
0x8000
6
*
Immediately after re-
(32768 bytes)
(2048 bytes)
0xFF is read
0xFF is read
(192 bytes)
(256 bytes)
set release
(64 bytes)
SFR1
SFR3
SFR2
Flash
RAM
5
*
Others
Page 12
0xD5
Enable a change in the FLSCR1 setting
Reserved
4
*
mapped in the data
CR1EN
(32768 bytes)
BOOTROM is
(2048 bytes)
0xFF is read
(2048 bytes)
0xFF is read
BOOTROM
(192 bytes)
(256 bytes)
W
(64 bytes)
When the
SFR1
SFR3
SFR2
Flash
RAM
area
3
*
2
*
1
*
TMP89FM42
0
*
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