tmp89fh40 TOSHIBA Semiconductor CORPORATION, tmp89fh40 Datasheet - Page 253
tmp89fh40
Manufacturer Part Number
tmp89fh40
Description
8 Bit Microcontroller Tlcs-870/c1 Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP89FH40.pdf
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RA001
16.12.3
RXD0 pin input
UART0SR<RBFL>
UART0SR<OERR>
INTRXD0 interrupt request
RD0BUF
error flag UART0SR<OERR> is set to "1" and an INTRXD0 interrupt request is generated. The data received at
the occurrence of the overrun error is discarded and the previous received data is maintained. Subsequently, if
data is received while UART0SR<OERR> is still "1", no INTRXD0 interrupt request is generated, and the
received data is discarded. (Figure 16-12)
set.) That is to say, if these errors are detected together with an overrun error during the reading of UART0SR,
they have occurred in the previous received data (the data stored in RD0BUF). (Figure 16-13)
RD0BUF is read subsequently. (Figure 16-14)
when RD0BUF is read subsequently. In this case, UART0SR<OERR> will be cleared to "0" when UART0SR
is read again and RD0BUF is read. (Figure 16-14)
If receiving of all data bits is completed before the previous received data is read from RD0BUF, the overrun
Note that parity or framing errors in the discarded received data cannot be detected. (These error flags are not
If UART0SR<OERR> is "1" when UART0SR is read, UART0SR<OERR> will be cleared to "0" when
If UART0SR<OERR> is set to "1" after UART0SR is read, UART0SR<OERR> will not be cleared to "0"
Overrun error
Figure 16-12 Generation of INTRXD0 Interrupt Request
Start Bit0
Bit1
Data A
Bit7 Stop Start Bit0
The contents of data B are discarded
An interrupt request
is generated.
and those of data A are maintained.
Data A
Page 239
Bit1
Data B
Bit7 Stop
The flag is set.
The contents of data C are discarded
An interrupt request
is generated.
and those of data A are maintained.
Start Bit0
Data C
Bit1
Bit7 Stop
No interrupt
request is
generated.
TMP89FH40
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