tmp89fh40 TOSHIBA Semiconductor CORPORATION, tmp89fh40 Datasheet - Page 321
tmp89fh40
Manufacturer Part Number
tmp89fh40
Description
8 Bit Microcontroller Tlcs-870/c1 Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP89FH40.pdf
(426 pages)
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RA002
AD converted value register (lower side)
AD converted value register (upper side)
ADCDRH
ADCDRL
(0x0036)
(0x0037)
Note 1: A read of ADCDRL or ADCDRH must be read after the INTADC interrupt is generated or after ADCCR2<EOCF> becomes
Note 2: In single mode, do not read ADCDRL or ADCDRH during AD conversion (ADCCR2<ADBF>="1"). (If AD conversion is
Note 3: If STOP, IDLE0 or SLOW mode is started, ADCDRL and ADCDRH are initialized to "0".
Note 4: If ADCCR1<AMD> is set to "00", ADCDRL and ADCDRH are initialized to "0".
Note 5: If an instruction to read ADCDRH is executed, "0" is read from bits 7 through 2.
Note 6: If AD conversion is finished in repeat mode in the interim between a read of ADCDRL and a read of ADCDRH, the previous
Read/Write
Read/Write
Bit Symbol
Bit Symbol
After reset
After reset
"1".
finished in the interim between a read of ADCDRL and a read of ADCDRH, the INTADC interrupt request is canceled,
and the conversion result is lost.)
converted value is retained without overwriting the AD converted value register. In this case, the INTADC interrupt request
is canceled, and the conversion result is lost.
AD07
R
R
7
0
7
0
-
AD06
R
R
6
0
6
0
-
AD05
R
R
5
0
5
0
Page 307
-
AD04
R
R
4
0
4
0
-
AD03
R
R
3
0
3
0
-
AD02
R
R
2
0
2
0
-
AD01
AD09
R
R
1
0
1
0
TMP89FH40
AD00
AD08
R
R
0
0
0
0
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