W83791D Information Storage Devices, Inc, W83791D Datasheet

no-image

W83791D

Manufacturer Part Number
W83791D
Description
Hardware Monitor With Speech Synthesizer And Asf Functions
Manufacturer
Information Storage Devices, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
W83791D
Manufacturer:
Winbond
Quantity:
116
Part Number:
W83791D
Manufacturer:
WINBOND
Quantity:
290
W83791D
Winbond H/W
Monitoring IC

Related parts for W83791D

W83791D Summary of contents

Page 1

... W83791D Winbond H/W Monitoring IC ...

Page 2

... W83791D Data Sheet Revision History Pages Dates Version 1 n.a. 2 n.a. 01/Jan 3 P.7 01/Jan 4 P.34 01/Jan 5 P.43/44 19/Mar 6 21/May 60/61 P. 58/ All pages 09/Aug Please note that all data and specifications are subject to change without notice. All the trademarks of products and companies mentioned in this data sheet belong to their respective owners ...

Page 3

... Smart Fan Control ................................................................................................... 23 6.8 Temperature Measurement Machine ..................................................................................................25 6.8.1 Monitor temperature from thermistor: ....................................................................... 25 6.8.2 Monitor temperature from Pentium II 6.8.3 SMI# interrupt for W83791D Voltage........................................................................ 26 6.8.4 SMI# interrupt for W83791D Fan ............................................................................. 26 6.8.5 SMI# interrupt TM thermal diode or bipolar transistor 2N3904... 25 for W83791D temperature sensor 1/2/3 ........................................................................ ii Publication Release Date: Aug, 2001 W83791D Preliminary Revision 0 ...

Page 4

... Over-Temperature (OVT#) for W83791D temperature sensor 1/2/3.......................... 28 7 CONTROL AND STATUS REGISTER........................ ERROR! BOOKMARK NOT DEFINED. 7.1 Speech Flash Memory Address Registers 7.2 Speech Flash Memory Data Registers 7.3 Speech Flash Memory Control Register 7.4 Event Trigger Timeout Register 7.5 Speech Programmable Trigger Register 7.6 Speech Input Trigger Property Register 7 ...

Page 5

... SMI# Mask Register III -- Index 9Ch (Bank 0)..................................... Error! Bookmark not defined. 7.80 Interrupt Mask Register III -- Index 9Dh (Bank 0) ................................ Error! Bookmark not defined. 7.81 FAN4_PRE_SCALE register-- Index 9Eh (Bank 0).............................. Error! Bookmark not defined. 7.82 FAN5_PRE_SCALE register-- Index 9Fh (Bank 0).............................. Error! Bookmark not defined. iv Publication Release Date: Aug, 2001 W83791D Preliminary Bookmark not Revision 0.41 ...

Page 6

... ASF Response Registers -- 40h-7Fh (Bank 1)....................................... Error! Bookmark not defined. 8.3.1 ASF Upper/Lower Temperature Registers:.................. Error! Bookmark not defined. 8.3.2 Sensor device: (SMBus Address, Read/Write) Index A4h-A5h (Bank 0)Error! Bookmark not defined. Error! Bookmark not defined. v Publication Release Date: Aug, 2001 W83791D Preliminary Bookmark not Bookmark not Bookmark not Bookmark ...

Page 7

... BJT RT-Table - 50h-57h (Bank 7) – TEST mode only.......................... Error! Bookmark not defined. 9 ELECTRICAL CHARACTERISTICS .................................................................................... 30 9.1 Absolute Maximum Ratings...............................................................................................................30 9.2 DC Characteristics.............................................................................................................................30 9.3 AC Characteristics.............................................................................................................................32 9.3.1 Serial Bus Timing Diagram ...................................................................................... 32 10 HOW TO READ THE TOP MARKING ................................................................................. 33 11 PACKAGE SPECIFICATION ............................................................................................... 34 vi Publication Release Date: Aug, 2001 W83791D Preliminary Revision 0.41 ...

Page 8

... If the VSB power on setting refers to Intel VRM 9.x, the VID table within W83791D will be according to the new one. W83791D also has 2 specific pins to provide selectable address setting for application of multiple devices ( devices) wired through I W83791D speech function is enabled by building in a programmable speech synthesizer with a 9-bit current DAC output as well as a connectable external flash memory for storing voice data ...

Page 9

... An optional beep tone could be used as a warning signal when the monitored parameters are out of the preset range Intel LDCM (LanDesk Client 2 Publication Release Date: Aug, 2001 W83791D Preliminary Revision 0.41 ...

Page 10

... PWM (pulse width modulation) outputs for fan speed control (1~3 support Smart Fan control) and 5 Fan speed inputs for monitoring --- Total sets of fan speed monitoring and controlling Issue SMI#, OVT#, IRQ signals to activate system protection Warning signal pop-up in application software 3 Publication Release Date: Aug, 2001 W83791D Preliminary TM II (Deschutes) Revision 0.41 ...

Page 11

... Voltage monitoring accuracy Intel VRM 9.x Voltage monitoring accuracy Monitoring Temperature Range and Accuracy - +120 C Supply Voltage Operating Supply Current ADC Resolution TM II/III support, for both Windows 95/98/2000 1% (Max) 0.5% (Max) 3 C(Max typ. 8 Bits 4 Publication Release Date: Aug, 2001 W83791D Preliminary Revision 0.41 ...

Page 12

... W83791D Preliminary 24 VIDIN2 23 PWMTOUT3/VID_V90 FANIN1 FANIN2 FANIN3 VID4 CASEOPEN SLOTOCC VDD Publication Release Date: Aug, 2001 Revision 0.41 ...

Page 13

... Output clock numbers of this pin decide which mode is selected. 12 Connect to W55FXX. General purpose I/O function. If pin 9 (SPEECH_SEL) is trapped to high 12ts at VSB power on, this function will be active. Output mode signal to W55FXX serial Flash W83791D Preliminary Otherwise, GPIO pin or Publication Release Date: Aug, 2001 Revision 0.41 ...

Page 14

... CASE OPEN detection. An active high input from an external device 6ts when case is Intruded. This signal can be latched in external circuit which power is supplied by VBAT, even if W83791D is power off. Voltage Supply readouts from CPU. After programming, this pin can VID output to voltage regulator to generate Vcore for CPU. ...

Page 15

... Internally connected to all analog circuitry. The ground reference for all analog inputs. AIN 0V to 4.096V FSR Analog Inputs. This pin is power for W83791D. Bypass with the parallel combination (electrolytic or tantalum) and 0.1 F (ceramic) bypass capacitors. This pin is power for W83791D. AIN ...

Page 16

... General purpose I/O function. If pin 9 (SPEECH_SEL) is trapped to high 12ts at VSB power on, this function will be active. The I/O control and status is defined in BANK0 Index 13h~14h. PWMOUT Fan control can be selected by registers, but the PWMOUT can not support Smart Fan. 9 W83791D Preliminary Otherwise, GPIO pin or Publication Release Date: Aug, 2001 Revision 0.41 ...

Page 17

... If the monitoring value exceeds the limit value, the interrupt status will be set to 1 and W83791D will issue interrupt signals such as SMI# and IRQ if not masked.. ...

Page 18

... Event Trigger Queue W83791D provides 8 byte FIFO queue to store event trigger, i.e, the first 8 event can be served by speech and speech will clear FIFO queue after service. Coding of Speech program must assign correct CPU_MODE event vector to issue correct speech voices correspondent to speech trigger events. For example, CPU_MODE event vector =1 represents absence of CPU, then coding speech with CPU is absent voice ...

Page 19

... BIOS could write timeout value to register 08h and start timer setup speech trigger event (register 09h), then is BIOS test program started. Whenever the system is hang on specific item such as DRAM testing, W83791D would say “DRAM test fails” after the timeout previously set at CR[08h]. On the contrary, if DRAM test is ok, then BIOS could update the timeout value and proceed to the next test program ...

Page 20

... C is decouple capacitor and is usually 200p- 0.01uF SPK DATA ADDR CLK CTRL MODE EOP Hardware monitor status trigger . Besides, SPK can also connect to AC97 codec chip Line_Out. 8 ohm speaker 8050D, NPN transistor R C Figure W83791D Preliminary EEPROM 9-bit DAC SPK/LED Publication Release Date: Aug, 2001 Revision 0.41 ...

Page 21

... SMBus version 2.0 introduces the concept of dynamically assigned address called Address Resolution Protocol (ARP). By such mechanism, each device existing on the SMBus will be given an unique slave address ARP-capable device. Thus, to meet the new spec, W83791D uniquely provides ARP compliant function to acquire an unique slave address. ...

Page 22

... Read Bit. The next read byte count N indicates how many more data will be read in the second part of the message. Note that the combined data payload must not exceed 32bytes. Besides, W83791D also provides packet error code (PEC) to insure the accuracy during data transmission. ...

Page 23

... In order to implement network management in OS-absent, W83791D provides ASF Response Registers to meet ASF sensor spec result, the network server is able to monitor several environmental status of the client in OS-absent by PET frame values returned from W83791D, including temperature, voltage, fan speed, and case open. In below is the ASF diagram: ...

Page 24

... Event Status Index. The Event Severity gives the management station an indication of the severity of the event in the PET frame. Typical values are Monitor (0x01), Non Critical (0x08), or Critical Condition (0x10). 17 Publication Release Date: Aug, 2001 W83791D Preliminary Revision 0.41 ...

Page 25

... Event Sensor Type 0 Event Type Data Event Severity Data Data 10 Entity 0 Entity Instance 8 PEC [data dependent] 18 W83791D Preliminary Byte Count A … 0000 0100 Data 4 A … Reserved 0 0000 0000 1 A … … 0 ...

Page 26

... ADC. The pin 13 and pin 29 are discretely connected to the power supply +5V and 5VSB . There are two functions in these pins with 5V. The first function is to supply internal analog power in the W83791D and the second one is that these voltages are all connected to internal serial resistors to monitor the +5V and 5VSB voltage. ...

Page 27

... If the monitored ADC value in the N5VIN channel is 0.8635, VREF=3.6V and the parameter is 0.6818, then the negative voltage of V6 can be evaluated -5V. K 232 ( VREF 232 VIN VREF VIN 5 VREF Publication Release Date: Aug, 2001 W83791D Preliminary ) V 5 Revision 0.41 ...

Page 28

... FAN Speed Count and FAN Speed Control 6.7.1 Fan speed count W83791D support 5 sets of fan counting. Fan inputs are provided for signals from fans equipped with tachometer outputs. The level of these signals should be set to TTL level, and the maximum input voltage should not be over +5 ...

Page 29

... Zener Clamp 6.7.2 Fan speed control The W83791D provides five sets of PWM for fan speed control. The duty cycle of PWM can be programmed by a 8-bit registers defined in the Bank0 CR[81], CR[83], CR[94], CR[9E] and CR[9F] . The default duty cycle is set to 100%, that is, the default 8-bit register is set to 0xFFh. The expression of duty cycle can be represented as follows ...

Page 30

... Fan Speed Cruise mode. 6.7.3.1 Thermal Cruise mode At this mode, W83791D provides the Smart Fan system to automatically control fan speed to keep the temperatures of CPU and the system within specific range. At first a wanted temperature and interval must be set (ex. ...

Page 31

... Fan Speed Cruise mode At this mode, W83791D provides the Smart Fan system to automatically control the fan speed within a specific range. In the beginning, a wanted fan speed count and interval must be set (ex. 160 BIOS. As long as the fan speed count remains in the specific range, PWM duty cycle will keep the current value. If current fan speed count is higher than the high limit (ex ...

Page 32

... Figure 11. The pin of Pentium II/III ground (GND) and the pin D+ is connected to pin PIITDx in the W83791D. The resistor R=30K ohms should be connected to VREF to supply the diode bias current and the bypass capacitor C=3300pF should be added to filter the high frequency noise ...

Page 33

... Pentium II/III Therminal Diode 6.8.3 SMI# interrupt for W83791D Voltage SMI# interrupt for voltage is Two-Times Interrupt Mode. Voltage exceeding high limit or going below low limit will causes an interrupt if the previous interrupt has been reset by reading all the interrupt Status Register. (Figure 12-1.) 6.8.4 SMI# interrupt for W83791D Fan SMI# interrupt for fan is Two-Times Interrupt Mode ...

Page 34

... High limit Low limit SMI# * Figure 12-1. Voltage SMI# Mode 6.8.5 SMI# interrupt for W83791D temperature sensor 1/2/3 (1) Comparator Interrupt Mode Temperature exceeding T causes an interrupt and this interrupt will be reset by reading all the Interrupt Status O Register. Once an interrupt event has occurred by exceeding the interrupt will occur again when the next conversion has completed interrupt event has occurred by ...

Page 35

... Reset when Interrupt Status Registers are read Figure 12-5. One-Time Interrupt Mode Note. The IRQ interrupt action like SMI# , but the IRQ is level signal. 6.8.6 Over-Temperature (OVT#) for W83791D temperature sensor 1/2/3 (1) Comparator Mode: Temperature exceeding T causes the OVT# output activated until the temperature is less than T ...

Page 36

... The granularity of temperature separation between each OVT# output signal can be programmed at Bank0 CR[4Ch] bit 4- HYST OVT# (Comparator Mode; default) OVT# (Interrupt Mode) Figure 13 Over-Temperature Response Diagram ('C) 100 OVT *Interrupt Reset when Temperature 1/2/3 is read Current Temperature Figure 13-1. ACPI Mode 29 Publication Release Date: Aug, 2001 W83791D Preliminary * Revision 0.41 ...

Page 37

... A LIH -10 A LIL 0.5 0.8 1 1.6 2.0 2 0 +10 A LIH -10 A LIL 30 Publication Release Date: Aug, 2001 W83791D Preliminary UNIT CONDITIONS ...

Page 38

... TYP. MAX. UNIT 0 0.4 V 0.4 V 0 +10 A -10 A 0.5 0.8 1.1 t- 1.6 2.0 2.4 t+ 0.5 1.2 TH +10 LIH -10 LIL 31 Publication Release Date: Aug, 2001 W83791D Preliminary CONDITIONS - ...

Page 39

... SCL and SDA fall time t SCL SU;DAT VALID DATA t HD;DAT Serial Bus Timing Diagram SYMBOL MIN SCL t 4.7 HD;SDA t 4.7 SU;STO t 120 SU;DAT t 5 HD;DAT Publication Release Date: Aug, 2001 W83791D Preliminary SU;STO MAX. UNIT 1.0 uS 300 nS Revision 0.41 ...

Page 40

... The top marking of W83791D W83791D 025AA Left: Winbond logo 1st line: Type number W83791D, D means LQFP (Thickness = 1.4 mm). 2nd line: Tracking code 025 A A 025: packages made in 2000, week 25 A: assembly house ID; A means ASE, O means OSE A: IC revision; A means version A, B means version B ...

Page 41

... Rm. 803, World Trade Square, Tower II 123 Hoi Bun Rd., Kwun Tong 2730 Orchard Parkway Kowloon, Hong Kong San Jose, CA 95134 U.S.A. TEL: 852-27516023-7 TEL: 1-408-9436666 FAX: 852-27552064 FAX: 1-408-9436668 34 Publication Release Date: Aug, 2001 W83791D Preliminary Dimension in mm Max. Min. Nom. Max. 1.60 --- --- 0.05 ...

Page 42

... I2C address setting BEEP ADRMSELIN VCC R41 0 R EVNT1/A2 IA2 R42 0 R EVNT2/A1 IA1 R43 0 R EVNT3/A0 IA0 /782D : Only for W83782D /791D : Only for W83791D L1 INDUCTOR FB/791D +5VSB C1 C2 CAP CAP 10u/791D 0.1u/791D L2 INDUCTOR FB/782D + CAP CAP 0.1u/782D ...

Page 43

... OUT3/VID90 R74 47K /791D R Select one of the two VID Table setting. 0:Old VID Table(VRM 8.3) 1:New VID Table(VRM 9.0) WINBOND ELECTRONICS CORP. Title W83782D-W83791D Application Circuit Size Document Number Custom Date: Tuesday, May 22, 2001 Publication Release Date: Aug, 2001 Revision 0.41 W83791D Preliminary ...

Page 44

... CKOUT/D6 R94 R 0 DATA/D5 R96 R 0 CTRL/D4 R98 R 0 MODE/D3 SD[0..7] R100R 0 SPK/D2 R102R 0 PWMOUT1/D1 R103R 0 PWMOUT2/D0 WINBOND ELECTRONICS CORP. Title W83782D-W83791D Application Circuit Size Document Number B Date: Tuesday, May 22, 2001 Sheet Publication Release Date: Aug, 2001 Revision 0.41 W83791D Preliminary Rev 0 ...

Page 45

... EOP MODE CTRL VDD CTRL VDD VSS CLK VSS CLK ADDR DATA ADDR DATA W55F10 W55F10 WINBOND ELECTRONICS CORP. Title W83782D-W83791D Application Circuit Size Document Number Custom Date: Tuesday, May 22, 2001 Revision 0.41 Rev 0.2 Sheet ...

Page 46

... Modify R34 value as 220K ohm 3. Change SMI# (pin 44) circuit. This update is for B version. Update Pin44 (SMI#/LEDOUT) circuit. This update is for C version. 0.2 WINBOND ELECTRONICS CORP. Title W83782D-W83791D Application circuit Size Document Number A Date: Tuesday, May 22, 2001 39 Publication Release Date: Aug, 2001 ...

Related keywords