bd9745ekn ROHM Co. Ltd., bd9745ekn Datasheet - Page 15

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bd9745ekn

Manufacturer Part Number
bd9745ekn
Description
7-channel Switching Regulator Controller For Digital Camera
Manufacturer
ROHM Co. Ltd.
Datasheet
6.SOFT START , SS1
7.ERRAMP 1~7
8.ERRCOMP , Start Up OSC
9.Current mode control block
10.PWM COMP
The maximum on-duty is established internally at approximately 85%.
The circuit prevents inrush current in startup by ramping DC/DC output voltage.
The soft-start time of each channel is designed below.
DC/DC converter of CH1~4 operates on current-mode PWM. In current-mode PWM controller, Main FET turn
on to detect CLK edge, and turn off to detect a peak current of inductor.
Using UDSEL pins, DC/DC converter of CH1~4 is switched to Step-up converter or Step-down converter.
The PWM comparators are voltage - pulse width converters that control the output pulse on time according to
the input voltage. The circuit supplies a pulse width controlled signal to the driver, by comparing the triangular
wave oscillator with the error amplifier’s output voltage.
This amplifier monitors the output voltage of the switching regulator channels and outputs a PWM controlled
signal accordingly.
ERRAMP1, 2,3,4,6,7’s reference voltage is set by applying voltage of 0.8V. ERRAMP5’s reference
voltage connected to GND, ERRAMP7I’s reference voltage is set to 0.4V.
And all channels have the R-C component for internal compensation.
The Error Comparator monitors the output voltage of the switching regulator and outputs a PFM controlled
signal accordingly. The Start Up OSC operates when power supply voltage reaches 1.5V, and is switched
ON/OFF by output of ERRCOMP. This OSC oscillates at around 300kHz.
When VCC voltage is above 2.6V, or CH1 soft-start time is over, this circuit stops to oscillate.
a. CH1・・・・・・・Typical IC Design’s output startup time is 4.2msec. Only CH1, the startup time doesn’t
b. CH5・・・・・・・The soft start function of CH5 is accomplished by ramping the VREF pin (30pin) from 0V
c. CH2,3,4,6,7・・・The soft start function of these channel is accomplished by internal reference over
depend on OSC frequency.
to 1V over period of about 10000 SLOPE cycle(7.7msec at 1.2MHz).
period of about 10000 SLOPE cycle(8.5msec at 1.2MHz).
REV. D
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