ip1206 International Rectifier Corp., ip1206 Datasheet
ip1206
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ip1206 Summary of contents
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... Dual Output www.irf.com Multiphase Optimized LGA Power Block Description The iP1206 is a fully optimized solution for medium current synchronous buck applications. The iP1206 can be configured as a dual output voltage power supply delivering up to 15A of current per output. Alternatively, the iP1206 can be configured as a single output voltage power supply delivering up to 30A of current ...
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... JEDEC, JESD22-A115 (MM[50V], Class ENABLE TRACK VO3 VCC PGOOD1 VREF AGND 36 PGND 6 VCB2 OC2 VCH VCL OC1 2/26/2008 iP1206PbF VP2 VP1 PGOOD2 SYNC SEQ FB1S FB1 CC1 18 SS1 17 VIN1 16 PGND VSW1 PGND VCB1 12 2 ...
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... V 0.784 0.8 0.810 V 1.14 - 1.34 V 150 - - µA 2/26/2008 iP1206PbF o C Conditions = V = 12V 1.5V 15A 300kHz 25ºC SW BLK V = 12V, ENABLE = 0V IN SS= switching; V tied SS= switching V Rising & Falling 0ºC to 105ºC (Note 2) ...
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... V 0 0.1 0.5 V 110 115 120 % - - 5 µs 2/26/2008 iP1206PbF Conditions Soft Start Pin = Vref (Note 3) (Note 300kHz 300kHz 300kHz S 20% above Free Running Freq Percentage of Voltage Reference I = 2mA SINK Percentage of Voltage Reference Output Voltage set to 1.25Vref (Note3) ...
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... Note3: Guaranteed by design but not tested in production. Note4: Block Temperature is defined as any Die temperature within the package. www.irf.com Min Typ Max Units 20 24 130 145 - º ºC 6.7 7.2 7 110 mA 2/26/2008 iP1206PbF Conditions V = 12V 7.5KΩ IN OCSET (Note 3) (Note 12V 50mA CC LOAD 100mA CC LOAD 5 ...
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... Master enable pin. Recycling this pin will reset OV, SS, and Pre-Bias latch for both outputs. No connect. This pin is not for electrical connection. Switching frequency setting pin Output over voltage protection sense pin for output 2 Inverting input for Error Amplifier 2 Analog Ground 2/26/2008 iP1206PbF 6 ...
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... Bias 0.8V Generator UVLO VCH1 VCH2 PWM Comp1 Thermal Shutdown Ramp1 Two Phase Oscillator Ramp2 PWM Comp2 PGood / OVP SS1 / SD Tracking Regulator Fig. 2: Simplified block diagram of the iP1206 2/26/2008 iP1206PbF S S POR Q POR POR Driver OVP1 OVP2 SS1 PBias1 3uA 20uA ...
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... Safe Operating Area PCB Temperature (ºC) Fig. 3: Safe Operating Curve Output Current per Channel (A) Fig. 4: Power Loss vs. Output Current 2/26/2008 iP1206PbF 80 90 100 110 120 130 Maximum Typical ...
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... O 0. 125ºC -2.8 BLK 0.80 -5.6 0 1.72 1.64 10.8 1.56 8.7 1.48 6.5 1.40 4.3 1.32 2.2 1.24 0.0 1.16 -2.2 1.08 -4.3 500 600 1.00 0.1 200 250 300 350 400 450 Switching Frequency (KHz) 2/26/2008 iP1206PbF = 30A = 1µH = 125ºC ` 1.5 2.2 2.9 3.6 4.3 Output Voltage (V) Fig. 4b: Power Loss vs. Output Voltage F 0.2 0.3 0.4 0.5 0.6 0.7 0.8 Output Inductance (µH) Fig. 4d: Power Loss vs. Output Inductor 500 550 600 13.5 11.3 9.0 6.8 4.5 2.3 0.0 -2.3 -4.5 5.0 5.7 19 12. ...
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... Circuit Description THEORY OF OPERATION Introduction The iP1206 is a versatile device for high performance buck converters. It consists of two synchronous buck controllers which can be operated either in a two independent outputs mode current share single output mode for high current applications. The timing of the IC is provided by an internal ...
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... Independent Mode In this mode the iP1206 provides control to two independent output power supplies with either common or different input voltages. The output voltage of each individual channel is set and ...
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... Fig. 9 shows the configuration of error amplifiers. See Fig 25a for a typical application. In this mode iP1206 makes sure the master channel starts first followed by slave channel to prevent any glitch during start up. This is done by clamping the output of slave’ ...
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... I SS1 = 28uA 64uA I hiccup1 = 3uA POR E/ SS2 = 28uA 64uA OCP2 I POR hiccup2 = 3uA E/A2 Fig. 10: Soft-Start circuit for iP1206 Output of POR ≅ 1.8V Soft-Start 0V Voltage 64uA Current flowing into Fb pin 0uA ≅ 1.6V of Error Amp 0.8V 0.8V 0V Voltage at Fb pin during soft-start OCP1 3V ≅ ...
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... Output Voltage Tracking Sequencing The iP1206 can accommodate a full spectrum of user programmable tracking and sequencing options using Track, Seq, Enable and Power Good pins. Through these pins both simple voltage tracking such as that required by the DDR memory application and more sophisticated sequencing such ratiometric or simultaneously can be implemented ...
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... Fault Protection The iP1206 monitors the output voltage for over voltage protection and power good indication. It senses the R of low side MOSFET for over current protection. It also protects the output for prebias ds(on) conditions. Fig. 15 below shows the IC’s operating waveforms under different fault conditions. ...
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... SS1 / SD 20 3uA Fig. 17: 3uA current source for discharging soft-start capacitor during hiccup www.irf.com Pre-Bias iP1206 is able to start up into a pre-charged of low side output, DS(on) disturbances of the output voltage. The output starts in asynchronous fashion and keeps the synchronous MOSFET off until the first gate signal for control MOSFET is generated ...
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... Rt (kOhm) Fig. 18: Switching Frequency vs. External Resistor (R www.irf.com Frequency Synchronization The iP1206 is capable of accepting an external digital synchronization signal. Synchronization will be enabled by the rising edge at an external clock. Per–channel switching frequency is set by external frequency oscillator frequency is twice the per- channel frequency. During synchronization selected such that the free running frequency is 20% below the synchronization frequency ...
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... REF ⎝ ⎠ When an external resistor divider is connected to the output as shown in Fig. 19. iP1206 Fb1 Fig. 19: Typical application of the iP1206 for programming the output voltage Equation (6) can be rewritten as: ⎛ ⎞ V ⎜ ⎟ = ∗ ref R R ⎜ ⎟ − ...
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... Since the output capacitor has a major role in overall performance of converter and determines the result of transient response, the selection of capacitors is critical. The iP1206 can perform well with all types of capacitors rule the capacitor must have low enough ESR to meet output ripple and load transient requirements, yet have high enough ESR to satisfy stability requirements ...
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... Feedback Compensation The iP1206 is a voltage mode controller; the control loop is a single voltage feedback path including error amplifier and error comparator. To achieve fast transient response and accurate regulation, a compensation circuit is necessary. The goal of the compensation network is to provide a closed loop transfer function with the highest 0dB ...
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... ⎤ ⎞ ⎟ ⎟ ⎥ ⎠ ⎦ 2/26/2008 iP1206PbF V OUT E REF Gain(dB feedback and its asymptotic gain plot impedance (current ...
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... DC-regulation accuracy (typically -5dB to -12dB). The phase margin should be greater than 45 Output overall stability. o capacitor Desired Phase Margin: Electrolytic <F s/2 , Tantalum Tantalum, <F s/2 ceramic Ceramic ESR Calculate C C Select 2/26/2008 iP1206PbF approximately one-sixth π Θ = max 3 − Θ 1 Sin = Θ Sin ...
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... C V C2=1nF ⎟ ⎟ ⎜ ⎜ ⎟ ⎟ ⎠ ⎝ ⎠ * All designs should be tested for stability to verify 2 2 osc the calculated values. 2/26/2008 iP1206PbF ). o1 ≅ π ...
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... Peak For and Peak ⇒ I trip From Note Peak Inductor Current (A) selection from Peak Inductor Current OCSET 2/26/2008 iP1206PbF + - - - - max L , Peak Maximum DC load current * 1.5 Peak Inductor Current = a maximum DC load current of an inductor ...
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... Fig. 25a: Typical Single Output Application circuit for 12V to 1.2V @ 30A Fig. 25b: Typical Dual Output Application circuit for 12V to 2.5V @ 15A , 12V to 1.5V@ 15A www.irf.com Circuit Typical Application 2/26/2008 iP1206PbF Vo = 1.2V 25 ...
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... Recommended PCB Footprint www.irf.com Fig. 26 2/26/2008 iP1206PbF ...
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... Vias in between the different power pads may overlap the pad opening and solder mask edge without the need to plug the via hole. Vias with a 13mil drill hole and 25mil capture pad were used in this example. • A minimum of six 10µF, X5R, 16V ceramic capacitors per iP1206 are recommended for the lowest loss due to input capacitor ESR. • ...
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... .006 [0.15] C 27X 23X CORNER ID Fig. 28 2/26/2008 iP1206PbF NOTES: 1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994. 2. DIMENSIONS ARE SHOWN IN INCHES[MILLIMETERS]. 3. CONTROLLING DIMENSION: INCHES 4. LAND PAD OPENINGS. 5 PRIMARY DATUM C (SEATING PLANE) IS DEFINED BY THE LAND PAD OPENINGS. 6 BILATERAL TOLERANCE ZONE IS APPLIED TO EACH SIDE OF THE PACKAGE BODY ...
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... Tape and Reel Information www.irf.com Fig. 29 2/26/2008 iP1206PbF 29 ...
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... Kansas Street., El Segundo, California 90245, USA Tel: (310) 252-7105 This product has been designed for the Industrial market. Visit us at www.irf.com for sales contact information Data and specifications subject to change without notice. 08/08/2007 2/26/2008 iP1206PbF Date Code (YYWW) YY= Year WW = Week Part Number Factory Code ...