zl2106 Intersil Corporation, zl2106 Datasheet - Page 29

• Manufacturer Part Number: zl2106
• Description: 6a Digital-dc Synchronous Step-down Dc-dc Converter
• Manufacturer: Intersil Corporation

7.11 Phase Spreading
When multiple point of load converters share a
common DC input supply, it is desirable to adjust the
clock phase offset of each device such that not all
devices start to switch simultaneously. Setting each
converter to start its switching cycle at a different point
in time can dramatically reduce input capacitance
requirements and efficiency losses. Since the peak
current drawn from the input supply is effectively
spread out over a period of time, the peak current
drawn at any given moment is reduced and the power
losses
dramatically.
In order to enable phase spreading, all converters must
be synchronized to the same switching clock. The CFG
pin is used to set the configuration of the SYNC pin for
each device as described in Section 6.7 “Switching
Frequency and PLL”.
Selecting the phase offset for the device is
accomplished by selecting a device address according
to the following equation:
For example:
The phase offset of each device may also be set to any
value between 0° and 360° in 22.5° increments via the
I
for further details.
7.12 Output Sequencing
A group of Zilker Labs devices may be configured to
power up in a predetermined sequence. This feature is
especially useful when powering advanced processors,
FPGAs, and ASICs that require one supply to reach its
operating voltage prior to another supply reaching its
operating voltage in order to avoid latch-up from
occurring. Multi-device sequencing can be achieved by
configuring each device through the I
interface or by using Zilker Labs patented autonomous
sequencing mode.
2
C/SMBus interface. Refer to Application Note AN33
• A device address of 0x00 or 0x20 would
• A device address of 0x01 or 0x21 would
• A device address of 0x02 or 0x22 would
Phase offset = device address x 45°
configure no phase offset
configure 45° of phase offset
configure 90° of phase offset
proportional
29
to
the
I
RMS
2
are
2
C/SMBus
reduced
ZL2106
Autonomous sequencing mode configures sequencing
by using events transmitted between devices over the
DDC bus.
Table 20. CFG Pin Configurations for Sequencing
and Tracking
12.1 kΩ
14.7 kΩ
16.2 kΩ
17.8 kΩ
21.5 kΩ
23.7 kΩ
26.1 kΩ
31.6 kΩ
34.8 kΩ
38.3 kΩ
46.4 kΩ
51.1 kΩ
56.2 kΩ
The sequencing order is determined using each
device’s
sequencing mode (configured using the CFG pin), the
devices must be assigned sequential SMBus addresses
with no missing addresses in the chain. This mode will
also constrain each device to have a phase offset
according to its SMBus address as described in section
7.11 “Phase Spreading”.
The sequencing group will turn on in order starting
with the device with the lowest SMBus address and
will continue through to turn on each device in the
address chain until all devices connected have been
turned on. When turning off, the device with the
highest SMBus address will turn off first followed in
reverse order by the other devices in the group.
Sequencing is configured by connecting a resistor from
the CFG pin to ground as described in Table 20. The
CFG pin is also used to set the configuration of the
SYNC pin as well as to determine the sequencing
method and order.
“Switching Frequency and PLL” for more details on
the operating parameters of the SYNC pin.
Multiple device sequencing may also be achieved by
issuing PMBus commands to assign the preceding
10 kΩ
11 kΩ
Open
R
High
Low
CFG
Configuration
SMBus
Auto detect
Auto detect
Auto detect
Auto detect
Auto detect
Auto detect
SYNC Pin
Output
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
Input
address.
Please refer to section 6.7
Data Sheet Revision 2/19/2009
Device is MIDDLE in
Tracking enabled as
Sequence disabled.
defined in Table 17.
Device is FIRST in
Tracking disabled.
Tracking disabled.
Tracking disabled.
nested sequence.
Device is LAST in
nested sequence.
nested sequence.
Sequencing and
Sequencing and
Configuration
Sequencing
Tracking are
Tracking are
Using
disabled.
disabled.
www.intersil.com
autonomous