attiny13-20ss ATMEL Corporation, attiny13-20ss Datasheet - Page 27

• Manufacturer Part Number: attiny13-20ss
• Description: 8-bit Microcontroller With 1k Bytes In-system Programmable Flash - Atmel Corporation
• Manufacturer: ATMEL Corporation

Power Management
and Sleep Modes
MCU Control Register –
MCUCR
2535G–AVR–01/07
The high performance and industry leading code efficiency makes the AVR microcon-
trollers an ideal choice for low power applications.
Sleep modes enable the application to shut down unused modules in the MCU, thereby
saving power. The AVR provides various sleep modes allowing the user to tailor the
power consumption to the application’s requirements.
To enter any of the three sleep modes, the SE bit in MCUCR must be written to logic
one and a SLEEP instruction must be executed. The SM1..0 bits in the MCUCR Regis-
ter select which sleep mode (Idle, ADC Noise Reduction, or Power-down) will be
activated by the SLEEP instruction. See Table 10 for a summary. If an enabled interrupt
occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU is then halted
for four cycles in addition to the start-up time, executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register
File and SRAM are unaltered when the device wakes up from sleep. If a reset occurs
during sleep mode, the MCU wakes up and executes from the Reset Vector.
Figure 11 on page 21 presents the different clock systems in the ATtiny13, and their dis-
tribution. The figure is helpful in selecting an appropriate sleep mode.
The MCU Control Register contains control bits for power management.
• Bit 5 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the
SLEEP instruction is executed. To avoid the MCU entering the sleep mode unless it is
the programmer’s purpose, it is recommended to write the Sleep Enable (SE) bit to one
just before the execution of the SLEEP instruction and to clear it immediately after wak-
ing up.
• Bits 4, 3 – SM1..0: Sleep Mode Select Bits 2..0
These bits select between the three available sleep modes as shown in Table 10.
Table 10. Sleep Mode Select
• Bit 2 – Res: Reserved Bit
This bit is a reserved bit in the ATtiny13 and will always read as zero.
Bit
Read/Write
Initial Value
SM1
0
0
1
1
R
7
–
0
PUD
R/W
SM0
6
0
0
1
0
1
R/W
SE
5
0
Sleep Mode
Idle
ADC Noise Reduction
Power-down
Reserved
SM1
R/W
4
0
SM0
R/W
3
0
—
R
2
0
ISC01
R/W
1
0
ISC00
R/W
0
0
MCUCR
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