attiny13-20ss ATMEL Corporation, attiny13-20ss Datasheet - Page 46

• Manufacturer Part Number: attiny13-20ss
• Description: 8-bit Microcontroller With 1k Bytes In-system Programmable Flash - Atmel Corporation
• Manufacturer: ATMEL Corporation

46
ATtiny13
Consider the clock period starting shortly after the first falling edge of the system clock.
The latch is closed when the clock is low, and goes transparent when the clock is high,
as indicated by the shaded region of the “SYNC LATCH” signal. The signal value is
latched when the system clock goes low. It is clocked into the PINxn Register at the suc-
ceeding positive clock edge. As indicated by the two arrows tpd,max and tpd,min, a
single signal transition on the pin will be delayed between ½ and 1½ system clock
period depending upon the time of assertion.
When reading back a software assigned pin value, a nop instruction must be inserted as
indicated in Figure 23. The out instruction sets the “SYNC LATCH” signal at the positive
edge of the clock. In this case, the delay tpd through the synchronizer is one system
clock period.
Figure 23. Synchronization when Reading a Software Assigned Pin Value
INSTRUCTIONS
SYSTEM CLK
SYNC LATCH
PINxn
r16
r17
out PORTx, r16
0x00
nop
t
pd
0xFF
in r17, PINx
2535G–AVR–01/07
0xFF