pic24hj128gp510at-i-pt Microchip Technology Inc., pic24hj128gp510at-i-pt Datasheet - Page 61

• Manufacturer Part Number: pic24hj128gp510at-i-pt
• Description: High-performance, 16-bit Microcontrollers
• Manufacturer: Microchip Technology Inc.

5.0
The PIC24HJXXXGPX06A/X08A/X10A devices con-
tain internal Flash program memory for storing and
executing application code. The memory is readable,
writable and erasable during normal operation over the
entire V
Flash memory can be programmed in two ways:
1.
2.
ICSP
PIC24HJXXXGPX06A/X08A/X10A device to be seri-
ally programmed while in the end application circuit.
This is simply done with two lines for programming
clock and programming data (one of the alternate pro-
gramming pin pairs: PGECx/PGEDx, and three other
lines for power (V
(MCLR). This allows customers to manufacture boards
with unprogrammed devices and then program the dig-
FIGURE 5-1:
© 2009 Microchip Technology Inc.
Note:
In-Circuit Serial Programming™ (ICSP™)
programming capability
Run-Time Self-Programming (RTSP)
DD
FLASH PROGRAM MEMORY
programming
range.
This data sheet summarizes the features
of the PIC24HJXXXGPX06A/X08A/X10A
family of devices. However, it is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to the “PIC24H
Family Reference Manual”, Section 5.
“Flash Programming” (DS70228), which
is available from the Microchip website
(www.microchip.com).
Using
Program Counter
Using
Table Instruction
User/Configuration
Space Select
DD
), ground (V
ADDRESSING FOR TABLE REGISTERS
capability
PIC24HJXXXGPX06A/X08A/X10A
SS
) and Master Clear
1/0
0
allows
TBLPAG Reg
8 bits
Preliminary
a
Program Counter
24-bit EA
24 bits
ital signal controller just before shipping the product.
This also allows the most recent firmware or a custom
firmware to be programmed.
RTSP is accomplished using TBLRD (table read) and
TBLWT (table write) instructions. With RTSP, the user
can write program memory data either in blocks or
‘rows’ of 64 instructions (192 bytes) at a time, or single
instructions and erase program memory in blocks or
‘pages’ of 512 instructions (1536 bytes) at a time.
5.1
Regardless of the method used, all programming of
Flash memory is done with the table read and table
write instructions. These allow direct read and write
access to the program memory space from the data
memory while the device is in normal operating mode.
The 24-bit target address in the program memory is
formed using bits<7:0> of the TBLPAG register and the
Effective Address (EA) from a W register specified in
the table instruction, as shown in Figure 5-1.
The TBLRDL and the TBLWTL instructions are used to
read or write to bits<15:0> of program memory.
TBLRDL and TBLWTL can access program memory in
both Word and Byte modes.
The TBLRDH and TBLWTH instructions are used to read
or write to bits<23:16> of program memory. TBLRDH
and TBLWTH can also access program memory in Word
or Byte mode.
Working Reg EA
16 bits
Table Instructions and Flash
Programming
0
Byte
Select
DS70592A-page 59