atmega162v ATMEL Corporation, atmega162v Datasheet - Page 5

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atmega162v

Manufacturer Part Number
atmega162v
Description
Atmega162 8-bit Avr Microcontroller With 16k Bytes Of In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet

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Pin Descriptions
VCC
GND
Port A (PA7..PA0)
Port B (PB7..PB0)
Port C (PC7..PC0)
2513JS–AVR–08/07
Note that the shared UBRRHI Register in ATmega161 is split into two separate registers in
ATmega162, UBRR0H and UBRR1H. The location of these registers will not be affected by the
ATmega161 compatibility fuse.
Digital supply voltage
Ground
Port A is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port A output buffers have symmetrical drive characteristics with both high sink and source
capability. When pins PA0 to PA7 are used as inputs and are externally pulled low, they will
source current if the internal pull-up resistors are activated. The Port A pins are tri-stated when a
reset condition becomes active, even if the clock is not running.
Port A also serves the functions of various special features of the ATmega162 as listed on
72.
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port B output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port B also serves the functions of various special features of the ATmega162 as listed on
72.
Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port C output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port C pins are tri-stated when a reset condition becomes active,
even if the clock is not running. If the JTAG interface is enabled, the pull-up resistors on pins
PC7(TDI), PC5(TMS) and PC4(TCK) will be activated even if a Reset occurs.
Port C also serves the functions of the JTAG interface and other special features of the
ATmega162 as listed on
The timed sequence for changing the Watchdog Time-out period is disabled. See
Sequences for Changing the Configuration of the Watchdog Timer” on page 56
The double buffering of the USART Receive Registers is disabled. See
AVR UART – Compatibility” on page 168
Pin change interrupts are not supported (Control Registers are located in Extended I/O).
One 16 bits Timer/Counter (Timer/Counter1) only. Timer/Counter3 is not accessible.
page
75.
for details.
ATmega162/V
“AVR USART vs.
for details.
“Timed
page
page
5

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