atmega103 ATMEL Corporation, atmega103 Datasheet - Page 56

• Manufacturer Part Number: atmega103
• Description: Atmega103 8-bit With 128k Bytes Of In-system Programmable Flash
• Manufacturer: ATMEL Corporation

56
ATmega103(L)
1. In the same operation, write a logical “1” to WDTOE and WDE. A logical “1” must
2. Within the next four clock cycles, write a logical “0” to WDE. This disables the
• Bits 2..0 – WDP2, WDP1, WDP0: Watchdog Timer Prescaler 2, 1 and 0
The WDP2, WDP1 and WDP0 bits determine the Watchdog Timer prescaling when the
Watchdog Timer is enabled. The different prescaling values and their corresponding
Time-out periods are shown in Table 21.
Table 21. Watchdog Timer Prescale Select
Note:
WDP2
0
0
0
0
1
1
1
1
be written to WDE even though it is set to one before the disable operation starts.
Watchdog.
The frequency of the Watchdog Oscillator is voltage-dependent as shown in the Electri-
cal Characteristics section.
The WDR (Watchdog Reset) instruction should always be executed before the Watchdog
Timer is enabled. This ensures that the reset period will be in accordance with the
Watchdog Timer prescale settings. If the Watchdog Timer is enabled without reset, the
Watchdog Timer may not start counting from zero.
To avoid unintentional MCU Reset, the Watchdog Timer should be disabled or reset
before changing the Watchdog Timer Prescale Select.
WDP1
0
0
1
1
0
0
1
1
WDP0
0
1
0
1
0
1
0
1
Number of WDT
Oscillator Cycles
16K cycles
32K cycles
64K cycles
128K cycles
256K cycles
512K cycles
1,024K cycles
2,048K cycles
Typical Time-out
at V
47 ms
94 ms
0.19 s
0.38 s
0.75 s
CC
1.5 s
3.0 s
6.0 s
= 3.0V
Typical Time-out
at V
0945I–AVR–02/07
15 ms
30 ms
60 ms
0.12 s
0,24 s
0.49 s
0.97 s
CC
1.9 s
= 5.0V