atmega32c1 ATMEL Corporation, atmega32c1 Datasheet - Page 137
atmega32c1
Manufacturer Part Number
atmega32c1
Description
Atmega32m1 Automotive 8-bit Avr Microcontroller With 32k/64k Bytes In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA32C1.pdf
(366 pages)
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14.5.3
14.5.3.1
7647A–AVR–02/08
Operation Mode Descriptions
One Ramp Mode (Edge-Aligned)
Figure 14-3. Cycle Presentation in Centered Mode
Figure 14-2
Mode is like One Ramp Mode which counts down and then up.
Notice that the update of the waveform generator registers is done regardless of ramp Mode at
the end of the PSC cycle.
Waveforms and duration of output signals are determined by parameters held in the registers
(POCRnSA, POCRnRA, POCRnSB, POCR_RB) and by the running mode. Two modes are pos-
sible :
The following figure shows the resultant outputs PSCOUTnA and PSCOUTnB operating in one
ramp mode over a PSC cycle.
PSC Counter Value
–
–
One Ramp Mode. In this mode, all the 3 PSCOUTnB outputs are edge-aligned and
the 3 PSCOUTnA can be also edge-aligned when setting the same values in the
dedicated registers.
In this mode, the PWM frequency is twice the Center Aligned Mode PWM frequency.
Center Aligned Mode. In this mode, all the 6 PSC outputs are aligned at the center of
the period. Except when using the same duty cycles on the 3 modules, the edges of
the outputs are not aligned. So the PSC outputs do not commute at the same time,
thus the system which is driven by these outputs will generate less commutation
noise.
In this mode, the PWM frequency is twice slower than in One Ramp Mode.
and
Figure 14-3
graphically illustrate the values held in the PSC counter. Centered
One PSC Cycle
ATmega32/64/M1/C1
UPDATE
137
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