at91cap7e ATMEL Corporation, at91cap7e Datasheet - Page 230
at91cap7e
Manufacturer Part Number
at91cap7e
Description
Customizable Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
1.AT91CAP7E.pdf
(520 pages)
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24.2.10.6
Register Name:
Access Type:
• PIDx: Peripheral Clock x Status
0 = The corresponding peripheral clock is disabled.
1 = The corresponding peripheral clock is enabled.
Note:
• HCKx: HClock Output x Status
0 = The corresponding HClock output is disabled.
1 = The corresponding HClock output is enabled.
Note:
230
PID23
PID15
PID7
31
23
15
7
-
PID2 to PID29 refer to identifiers as defined in
HCK0 - HCK3 correspond to PID26 - PID29 and therefore control the AHB clocks for the MP Block Master A, B, C, and D
respectively as defined in
AT91CAP7E
PMC Peripheral Clock Status Register
PID22
PID14
PID6
30
22
14
6
-
PMC_PCSR
Read-only
Section 10.2
HCK3(PID29)
PID21
PID13
PID5
29
21
13
5
Peripheral Identifiers.
HCK2(PID28)
Section 10.2
PID20
PID12
PID4
28
20
12
4
HCK1(PID27)
Peripheral Identifiers.
PID19
PID11
PID3
27
19
11
3
HCK0(PID26)
PID18
PID10
PID2
26
18
10
2
PID25
PID17
PID9
25
17
–
9
1
8549A–CAP–10/08
PID24
PID16
PID8
24
16
8
0
–
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