at91cap7e ATMEL Corporation, at91cap7e Datasheet - Page 471
at91cap7e
Manufacturer Part Number
at91cap7e
Description
Customizable Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
1.AT91CAP7E.pdf
(520 pages)
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Figure 32-3. GOVRE and OVREx Flag Behavior
32.5.5
8549A–CAP–10/08
(ADC_CHSR)
(ADC_CHSR)
ADC_LCDR
ADC_CDR0
ADC_CDR1
(ADC_SR)
(ADC_SR)
(ADC_SR)
(ADC_SR)
(ADC_SR)
GOVRE
ADTRG
DRDY
OVRE0
EOC0
EOC1
Conversion Triggers
CH0
CH1
Undefined Data
Undefined Data
Warning: If the corresponding channel is disabled during a conversion or if it is disabled and
then reenabled during a conversion, its associated data and its corresponding EOC and OVRE
flags in ADC_SR are unpredictable.
Conversions of the active analog channels are started with a software or a hardware trigger. The
software trigger is provided by writing the Control Register (ADC_CR) with the bit START at 1.
The hardware trigger can be one of the TIOA outputs of the Timer Counter channels, or the
external trigger input of the ADC (ADTRG). The hardware trigger is selected with the field TRG-
SEL in the Mode Register (ADC_MR). The selected hardware trigger is enabled with the bit
TRGEN in the Mode Register (ADC_MR).
If a hardware trigger is selected, the start of a conversion is detected at each rising edge of the
selected signal. If one of the TIOA outputs is selected, the corresponding Timer Counter channel
must be programmed in Waveform Mode.
Conversion
Undefined Data
Conversion
Data A
Data A
Data B
Conversion
Data B
Data C
Read ADC_CDR1
Data C
AT91CAP7E
Read ADC_SR
Read ADC_CDR0
471
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