at91cap7e ATMEL Corporation, at91cap7e Datasheet - Page 489
at91cap7e
Manufacturer Part Number
at91cap7e
Description
Customizable Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
1.AT91CAP7E.pdf
(520 pages)
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33.9
Table 33-14. Channel Conversion Time and ADC CLock
Notes:
Table 33-15. External Voltage Reference Input
Table 33-16. Analog Inputs
Table 33-17. Transfer Characteristics
8549A–CAP–10/08
Parameter
ADC Clock Frequency
ADC Clock Frequency
Startup Time
Track and Hold Acquisition Time
Conversion Time
Throughput Rate
Parameter
ADVREF Input Voltage Range
ADVREF Average Current
Operating Current on AVDD
Operating Current on VDDC
Standby Current on AVDD
Standby Current on ADVREF
Standby Current on VDDC
Parameter
Input Voltage Range
Input Leakage Current
Input Capacitance
Parameter
Resolution
Integral Non-linearity
Differential Non-linearity
Offset Error
Gain Error
ADC
1. Corresponds to 30 clock cycles at 13.2 MHz: 500nS (7clock cycles) for track and hold acquisition time and 23 clock cycles
for conversion.
The user can drive ADC input with impedance up to:
with SHTIM (Sample and Hold Time register) expressed in ns and Z
• Z
OUT
≤ (SHTIM -500) x 12.5
Conditions
Average on all DAC codes
Average on 4 conversions full speed
Average on 4 conversions full speed
Conditions
10-bit resolution mode
8-bit resolution mode
Return from Idle Mode
ADC Clock = 13.2 MHz
ADC Clock = 13.2 MHz
Min
Min
Min
2.6
Min
-1.5
500
0
6
Typ
Typ
OUT
Typ
Typ
1
8
0.5
10
expressed in ohms.
AT91CAP7E
ADVREF
440
AVDD
Max
Max
13.2
TBD
1.74
Max
Max
±0.9
600
400
300
300
600
10
2.5
40
80
±2
±2
(1)
Units
kSPS
Units
Units
Units
MHz
MHz
LSB
LSB
LSB
LSB
μs
ns
μs
μA
μA
μA
μA
nA
nA
nA
pF
Bit
V
489
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