atxmega192a1-au ATMEL Corporation, atxmega192a1-au Datasheet - Page 27
atxmega192a1-au
Manufacturer Part Number
atxmega192a1-au
Description
8/16-bit Xmega A1 Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
1.ATXMEGA192A1-AU.pdf
(113 pages)
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14. I/O Ports
14.1
14.2
14.3
8067M–AVR–09/10
Features
Overview
I/O configuration
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The XMEGA A1 devices have flexible General Purpose I/O Ports. A port consists of up to 8 pins,
ranging from pin 0 to pin 7. The ports implement several functions, including synchronous/asyn-
chronous input sensing, pin change interrupts and configurable output settings. All functions are
individual per pin, but several pins may be configured in a single operation.
All port pins (Pn) have programmable output configuration. In addition, all port pins have an
inverted I/O function. For an input, this means inverting the signal between the port pin and the
pin register. For an output, this means inverting the output signal between the port register and
the port pin. The inverted I/O function can be used also when the pin is used for alternate func-
tions. The port pins also have configurable slew rate limitation to reduce electromagnetic
emission.
Selectable input and output configuration for each pin individually
Flexible pin configuration through dedicated Pin Configuration Register
Synchronous and/or asynchronous input sensing with port interrupts and events
Asynchronous wake-up from all input sensing configurations
Two port interrupts with flexible pin masking
Highly configurable output driver and pull settings:
Optional Slew rate control
Configuration of multiple pins in a single operation
Read-Modify-Write (RMW) support
Toggle/clear/set registers for Output and Direction registers
Clock output on port pin
Event Channel 0 output on port pin 7
Mapping of port registers (virtual ports) into bit accessible I/O memory space
– Sense both edges
– Sense rising edges
– Sense falling edges
– Sense low level
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Totem-pole
Pull-up/-down
Wired-AND
Wired-OR
Bus-keeper
Inverted I/O
XMEGA A1
27
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