lpc1810 NXP Semiconductors, lpc1810 Datasheet - Page 71

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lpc1810

Manufacturer Part Number
lpc1810
Description
Lpc1850/30/20/10 32-bit Arm Cortex-m3 Mcu; Up To 200 Kb Sram; Ethernet, Two High-speed Usb, Lcd, And External Memory Controller
Manufacturer
NXP Semiconductors
Datasheet

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Table 16.
C
[1]
[2]
[3]
[4]
[5]
[6]
Symbol
t
t
t
WEHDNV
BLSHANV
BLSHDNV
L
= 30 pF; T
V
V
T
Latest of address valid, CS LOW, OE LOW to data valid.
Earliest of CS HIGH, OE HIGH, address change to data invalid.
Byte lane state bit (PB) = 1.
cy(CCLK)
OH
IH
= 2.5 V, V
= 2.5 V, V
Parameter
WE HIGH to data invalid
time
BLS HIGH to address
invalid time
BLS HIGH to data invalid
time
Dynamic characteristics: Static external memory interface
= 1/CCLK.
amb
IL
OL
=
= 0.5 V.
= 0.2 V.
40
C to 85
C; V
DD(REG)(3V3)
Conditions
and V
DD(IO)
[3]
[3]
[3]
over specified ranges <tbd>; AHB clock = 1 MHz
Min
<tbd>
<tbd>
<tbd>
…continued
Typ
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
Max
Unit
ns
ns
ns

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