p87lpc778 NXP Semiconductors, p87lpc778 Datasheet - Page 35

• Manufacturer Part Number: p87lpc778
• Description: Cmos Single-chip 8-bit 80c51 Microcontroller 128-byte Data Ram, 8 Kb Otp
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 12378
Product data
8.9.2 Open drain output configuration
pulled LOW, it is driven strongly and able to sink a fairly large current. These features
are somewhat similar to an open drain output except that there are three pull-up
transistors in the quasi-bidirectional output that serve different purposes.
One of these pull-ups, called the ‘very weak’ pull-up, is turned on whenever the port
latch for the pin contains a logic 1. The very weak pull-up sources a very small current
that will pull the pin HIGH if it is left floating.
A second pull-up, called the ‘weak’ pull-up, is turned on when the port latch for the pin
contains a logic 1 and the pin itself is also at a logic 1 level. This pull-up provides the
primary source current for a quasi-bidirectional pin that is outputting a ‘1’. If a pin that
has a logic 1 on it is pulled LOW by an external device, the weak pull-up turns off, and
only the very weak pull-up remains on. In order to pull the pin LOW under these
conditions, the external device has to sink enough current to overpower the weak
pull-up and take the voltage on the port pin below its input threshold.
The third pull-up is referred to as the ‘strong’ pull-up. This pull-up is used to speed up
low-to-high transitions on a quasi-bidirectional port pin when the port latch changes
from a logic 0 to a logic 1. When this occurs, the strong pull-up turns on for a brief
time, two CPU clocks, in order to pull the port pin HIGH quickly. Then it turns off
again.
The quasi-bidirectional port configuration is shown in
The open drain output configuration turns off all pull-ups and only drives the pulldown
transistor of the port driver when the port latch contains a logic 0. To be used as a
logic output, a port configured in this manner must have an external pull-up, typically
a resistor tied to V
quasi-bidirectional mode.
The open drain port configuration is shown in
Fig 10. Quasi-bidirectional output.
port latch
data
DD
Rev. 01 — 31 March 2004
. The pulldown for this mode is the same as for the
CLOCK DELAY
2 CPU
CMOS single-chip 8-bit microcontroller
Figure
N
input
P
data
strong
11.
Figure
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
P
V DD
P87LPC778
weak
10.
very
P
weak
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port
pin
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