lpc2158fbd100 NXP Semiconductors, lpc2158fbd100 Datasheet - Page 13
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lpc2158fbd100
Manufacturer Part Number
lpc2158fbd100
Description
Single-chip 16-bit/32-bit Microcontrollers; 512 Kb ?ash, With 32 Segment X 4 Lcd Driver
Manufacturer
NXP Semiconductors
Datasheet
1.LPC2158FBD100.pdf
(45 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
lpc2158fbd100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 3.
LPC2157_2158_2
Product data sheet
Symbol
P0[31]/UP_LED/
CONNECT
P1[0] to P1[31]
P1[16]
P1[17]
P1[25]/EXTIN0
P1[26]/RTCK
P1[27]/TDO
P1[28]/TDI
P1[29]/TCK
P1[30]/TMS
P1[31]/TRST
D+
D
RESET
XTAL1
XTAL2
RTCX1
RTCX2
V
SS
Pin description LPC2158
Pin
5
4
100
16
12
90
86
82
78
8
98
99
83
88
87
93
94
6, 13, 32,
39, 40,
85, 95
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[7]
[7]
[8]
[9]
[9]
[9]
[9]
[6]
Type
O
O
O
I/O
I/O
I/O
I/O
I
I/O
I/O
I/O
O
I/O
I
I/O
I
I/O
I
I/O
I
I/O
I/O
I
O
I
I
O
I
…continued
Description
P0[31] — General purpose output only digital pin.
UP_LED — USB GoodLink LED indicator. It is LOW when device is configured
(non-control endpoints enabled). It is HIGH when the device is not configured
or during global suspend.
CONNECT — Signal used to switch an external 1.5 k resistor under the
software control. Used with the SoftConnect USB feature.
Important: This is an digital output only pin. This pin MUST NOT be externally
pulled LOW when RESET pin is LOW or the JTAG port will be disabled.
Port 1: Port 1 is a 32-bit bidirectional I/O port with individual direction controls
for each bit. The operation of port 1 pins depends upon the pin function
selected via the pin connect block. Pins 0 through 15 and 18 through 24 of
port 1 are not available.
P1[16] — General purpose input/output digital pin (GPIO).
P1[17] — General purpose input/output digital pin (GPIO).
P1[25] — General purpose input/output digital pin (GPIO).
EXTIN0 — External Trigger Input. Standard I/O with internal pull-up.
P1[26] — General purpose input/output digital pin (GPIO).
RTCK — Returned Test Clock output. Extra signal added to the JTAG port.
Assists debugger synchronization when processor frequency varies.
Bidirectional pin with internal pull-up.
Note: LOW on RTCK while RESET is LOW enables pins P1[31:26] to operate
as Debug port after reset.
P1[27] — General purpose input/output digital pin (GPIO).
TDO — Test Data out for JTAG interface.
P1[28] — General purpose input/output digital pin (GPIO).
TDI — Test Data in for JTAG interface.
P1[29] — General purpose input/output digital pin (GPIO).
TCK — Test Clock for JTAG interface. This clock must be slower than
CPU clock (CCLK) for the JTAG interface to operate.
P1[30] — General purpose input/output digital pin (GPIO).
TMS — Test Mode Select for JTAG interface.
P1[31] — General purpose input/output digital pin (GPIO).
TRST — Test Reset for JTAG interface.
USB bidirectional D+ line.
USB bidirectional D line.
External reset input: A LOW on this pin resets the device, causing I/O ports
and peripherals to take on their default states, and processor execution to
begin at address 0. TTL with hysteresis, 5 V tolerant.
Input from the oscillator amplifier.
Output to the oscillator circuit and internal clock generator circuits.
Input to the RTC oscillator circuit.
Output from the RTC oscillator circuit.
Ground: 0 V reference.
Rev. 02 — 9 February 2009
Single-chip 16-bit/32-bit microcontrollers
LPC2157/2158
© NXP B.V. 2009. All rights reserved.
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