m30833fjgp Renesas Electronics Corporation., m30833fjgp Datasheet - Page 210
m30833fjgp
Manufacturer Part Number
m30833fjgp
Description
Renesas 16/32-bit Single-chip Microcomputer M16c Family / M32c/80 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.M30833FJGP.pdf
(527 pages)
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Figure 16.13 Serial Data Logic Inverse
2
0
16.1.3 Continuous Receive Mode
16.1.4 Serial Data Logic Inverse
C
1
9
3 .
B
8 /
When the UiRRM bit in the UiC1 register (i=0 to 4) is set to "1" (continuous receive mode), the TI bit is set
to "0" (data in the UiTB register) by reading the UiRB register. When the UiRRM bit is set to "1", do not set
dummy data in the UiTB register by program.
When the UiLCH bit in the UiC1 register is set to "1" (inverse), data logic written in the UiTB register is
inversed when transmitted. The inversed receive data logic can be read by reading the UiRB register.
Figure 16.13 shows a switching example of the serial data logic.
0
1
3
0
3
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4
a
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0 -
n
3 .
1
u
, 1
3
p
1
(
2
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0
0
3
6
(2) When the UiLCH bit in the UiC1 register is set to "1" (inverse)
Transfer clock
2
(1) When the UiLCH bit in the UiC1 register (i=0 to 4) is set to "0" (not inversed)
Transfer clock
NOTES:
C
1. The above applies when the CKPOL bit in the UiC0 register is set to "0" (data is transmitted on
8 /
Page 187
(no inverse)
the falling edge) and the UFORM bit in the UiC register is set to "0" (LSB first).
, 3
(inverse)
M
TxD
TxD
3
2
i
i
C
f o
"H"
"H"
"H"
"H"
"L"
"L"
"L"
"L"
8 /
4
3
8
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8
D
D
0
0
D
D
1
1
D
D
2
2
D
D
3
3
D
D
4
4
16. Serial I/O (Clock Synchronous Serial I/O)
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5
5
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D
6
6
D
D
7
7
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