m30833fjgp Renesas Electronics Corporation., m30833fjgp Datasheet - Page 236
m30833fjgp
Manufacturer Part Number
m30833fjgp
Description
Renesas 16/32-bit Single-chip Microcomputer M16c Family / M32c/80 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.M30833FJGP.pdf
(527 pages)
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R
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3
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J
Table 16.29 Clock-Divided Synchronous Function Select
Figure 16.27 Clock-Divided Synchronous Function
2
0
i=0 to 4
1
9
C
SCLKDIV Bit in
UiSMR Register
3 .
B
8 /
To generate the internal clock synchronized with the external clock, first set the SU1HIM bit in the
UiSMR2 register (i=0 to 4) and the SCLKDIV bit in the UiSMR register to values shown in Table 16.29.
Then apply a trigger signal to the CTSi pin. Either the same clock cycle as the external clock or external
clock divided by two can be selected as the transfer clock. The SCLKSTPB bit in the UiC1 register
controls the transfer clock. Set the SCLKSTPB bit accordingly, to start or stop the transfer clock during an
external clock operation. Figure 16.27 shows an example of the clock-divided synchronous function.
0
1
3
0
A
B
3
J
G
4
0
0
1
a
Trigger Signal
from the CTSi Pin
External Clock
from the CLKi Pin
0 -
n
o r
3 .
1
TxDi
TxDi
u
Transfer Clock
Transfer Clock
, 1
3
p
1
2
(
i=0 to 4
A, B : See Table 16.29.
M
0
0
3
6
2
C
UiSMR2 Register
Page 213
8 /
SU1HIM Bit in
0 or 1
, 3
0
1
M
3
2
C
f o
8 /
4
1
3
8
) T
8
1
2
Not synchronized
Same division as the external clock
Same division as the external clock
divided by 2
1
2
3
Clock-Divided Synchronous Function
3
4
2
4
5
5
6
3
6
7
7
8
4
8
5
The SCLKSTPB bit in the UiC1 register
stops the clock
16. Serial I/O (Special Function)
6
-
A in Figure 16.27
B in Figure 16.27
Example of Waveform
7
8
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