m30833fjgp Renesas Electronics Corporation., m30833fjgp Datasheet - Page 44
m30833fjgp
Manufacturer Part Number
m30833fjgp
Description
Renesas 16/32-bit Single-chip Microcomputer M16c Family / M32c/80 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.M30833FJGP.pdf
(527 pages)
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R
R
M
3. Memory
e
E
3
. v
J
Figure 3.1 Memory Map
2
0
Figure 3.1 shows a memory map of the M32C/83 group (M32C/83, M32C/83T).
M32C/83 group (M32C/83, M32C/83T) provides 16-Mbyte address space from addresses 000000
FFFFFF
The internal ROM is allocated lower addresses beginning with address FFFFFF
Kbyte internal ROM is allocated addresses FF0000
The fixed interrupt vectors are allocated addresses FFFFDC
of each interrupt routine. Refer to 10. Interrupts for details.
The internal RAM is allocated higher addresses beginning with address 000400
Kbyte internal RAM is allocated addresses 000400
when the subroutine is called or an interrupt is acknowledged.
SFR, consisting of control registers for peripheral functions such as I/O port, A/D conversion, serial I/O, and
timers, is allocated addresses 000000
SFR, are reserved space and cannot be accessed by users.
The special page vectors are allocated addresses FFFE00
tion and JSRS instruction. Refer to the Renesas publication Software Manual for details.
In memory expansion mode and microprocessor mode, some space are reserved and cannot be accessed
by users.
1
C
9
3 .
B
8 /
0
1
3
0
3
J
G
4
a
0 -
n
o r
16
3 .
1
u
.
, 1
3
p
NOTES:
1
2
(
1. In memory expansion and microprocessor modes
2. In memory expansion mode. This space becomes external space in microprocessor mode.
3. This space can be used in single-chip mode and memory expansion mode. This space becomes external
4. Watchdog timer interrupt, oscillation stop detection interrupt, and low voltage detection interrupt share vectors.
M
0
000000
000400
007FFF
008000
F00000
F80000
FFFFFF
space in microprocessor mode.
0
3
6
2
C
8 /
16
16
16
16
16
Page 21
16
16
, 3
M
Reserved Space
Reserved Space
External Space
Internal RAM
Internal ROM
3
2
C
SFR
f o
8 /
4
3
8
) T
8
(3)
(1)
(2)
16
to 0003FF
FFFFDC
FFFFFF
FFFE00
16
16
16
16
16
16
to 002BFF
Undefined Instruction
. All addresses, which have nothing allocated within
Watchdog Timer
to FFFFFF
BRK Instruction
Address Match
Special Page
Vector Table
Overflow
Reset
16
NMI
16
to FFFFDB
to FFFFFF
16
16
. Besides storing data, it becomes stacks
(4)
.
16
16
. It is used for the JMPS instruc-
. It stores the starting address
16
16
. For example, a 10-
. For example, a 64-
3. Memory
16
to
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