m30833fjgp Renesas Electronics Corporation., m30833fjgp Datasheet - Page 491
m30833fjgp
Manufacturer Part Number
m30833fjgp
Description
Renesas 16/32-bit Single-chip Microcomputer M16c Family / M32c/80 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.M30833FJGP.pdf
(527 pages)
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R
R
M
27.6 Interrupts
e
E
3
. v
J
Figure 27.1 Switching Procedure for INT Interrupt
2
0
27.6.1 ISP Setting
27.6.2 NMI Interrupt
27.6.3 INT Interrupt
C
1
9
3 .
B
8 /
After reset, the ISP is set to "000000
before the ISP is set. Therefore, the ISP must be set before an interrupt request is acknowledged. Set the
ISP to an even address, which allows interrupt sequences to be executed at a higher speed.
To use NMI interrupt, set the ISP at the beginning of the program. The NMI interrupt can be acknowl-
edged after the first instruction has been executed after reset.
• NMI interrupt cannot be denied. Connect the NMI pin to V
• The P8_5 bit in the P8 register indicates the NMI pin value. Read the P8_5 bit only to determine the pin
• H" and "L" of a signal applied to the NMI pin must be over 2 CPU clock cycles + 300 ns wide.
• Edge sensitive
• Level sensitive
• The IR bit may change to "1" (interrupt requested) when switching the polarity of the INT0 to INT5 pins.
0
_______
level after a NMI interrupt occurs.
1
Set the IR bit to "0" (no interrupt requested) after selecting the polarity. Figure 27.1 shows an example
of the switching procedure for the INT interrupt.
3
"H" and "L" of a signal applied to the INT0 to INT5 pins must be at least 1 CPU clock cycle + 200 ns
"H" and "L" of a signal applied to the INT0 to INT5 pins must be at least 250 ns wide, regardless of the
CPU clock.
0
wide. For example, "H" and "L" must be at least 234ns wide if X
3
J
G
4
a
o r
0 -
n
_______
3 .
______
u
1
_______
, 1
3
p
1
(
2
M
0
0
3
_______
6
2
C
8 /
Page 468
, 3
M
Set the ILVL2 to ILVL0 bits to "001
to "111
(INT interrupt request acknowledgement enabled)
3
2
Set the ILVL2 to ILVL0 bits in the INTiIC
register (i = 0 to 5) to "000
C
f o
8 /
Set the IR bit in the INTiIC register to "0"
4
3
Set the POL bit in the INTiIC register
8
2
) T
8
" (level 7)
______
16
______
(
_______
INT
". The program runs out of control if an interrupt is acknowledged
______
______
interrupt disabled)
_______
_______
______
______
2
" (level 0)
2
CC
" (level 1)
via a resistor (pull-up) when not in use.
IN
=30MHz with no division.
_______
27. Precautions (Interrupts)
______
______
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