r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 498
r5s72060w200fpv
Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S72060W200FPV.pdf
(1180 pages)
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Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
10.3.18 Timer Read/Write Enable Register (TRWER)
TRWER is an 8-bit readable/writable register that enables or disables access to the registers and
counters which have write-protection capability against accidental modification in channels 3 and
4.
• Registers and counters having write-protection capability against accidental modification
Rev. 2.00 Dec. 09, 2005 Page 474 of 1152
REJ09B0191-0200
Bit
7 to 1
0
22 registers: TCR_3, TCR_4, TMDR_3, TMDR_4, TIORH_3, TIORH_4, TIORL_3,
TIORL_4, TIER_3, TIER_4, TGRA_3, TGRA_4, TGRB_3, TGRB_4, TOER, TOCR1,
TOCR2, TGCR, TCDR, TDDR, TCNT_3, and TCNT4.
Bit Name
—
RWE
Initial value:
Initial
Value
All 0
1
R/W:
Bit:
R
7
0
-
R/W
R
R/W
R
6
0
-
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Read/Write Enable
Enables or disables access to the registers which have
write-protection capability against accidental
modification.
0: Disables read/write access to the registers
1: Enables read/write access to the registers
[Clearing condition]
•
R
5
0
-
When 0 is written to the RWE bit after reading
RWE = 1
R
4
0
-
R
3
0
-
R
2
0
-
R
1
0
-
RWE
R/W
0
1
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