r5s72060w200fpv Renesas Electronics Corporation., r5s72060w200fpv Datasheet - Page 823
r5s72060w200fpv
Manufacturer Part Number
r5s72060w200fpv
Description
32-bit Risc Microcomputer Superhtm Risc Engine Family / Sh7200 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5S72060W200FPV.pdf
(1180 pages)
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Bit
5
4
3
Bit Name
RDRF
NACKF
STOP
Initial
Value
0
0
0
R/W
R/W
R/W
R/W
Description
Receive Data Full
[Clearing conditions]
•
•
[Setting condition]
•
No Acknowledge Detection Flag
[Clearing condition]
•
[Setting condition]
•
Stop Condition Detection Flag
[Clearing condition]
•
[Setting conditions]
•
•
When 0 is written in RDRF after reading RDRF = 1
When ICDRR is read
When a receive data is transferred from ICDRS to
ICDRR
When 0 is written in NACKF after reading NACKF
= 1
When no acknowledge is detected from the receive
device in transmission while the ACKE bit in ICIER
is 1
When 0 is written in STOP after reading STOP = 1
In master mode, when a stop condition is detected
after frame transfer
In slave mode, when the slave address in the first
byte after the general call and detecting start
condition matches the address set in SAR, and then
the stop condition is detected
Rev. 2.00 Dec. 09, 2005 Page 799 of 1152
Section 16 I
2
C Bus Interface 3 (IIC3)
REJ09B0191-0200
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