op17gz Analog Devices, Inc., op17gz Datasheet

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op17gz

Manufacturer Part Number
op17gz
Description
Precision Jfet-input Operational Amplifiers
Manufacturer
Analog Devices, Inc.
Datasheet

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a
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
REV. A
NONINVERTING
FEATURES
Significant Performance Advantages over LF155 and
Low Input Offset Voltages: 500 V Max
Low Input Offset Voltage Drift: 2.0 V/ C
Minimum Slew Rate Guaranteed on All Models
Temperature-Compensated Input Bias Currents
Bias Current Specified Warmed-Up Over Temperature
Internal Compensation
Low Input Noise Current: 0.01 pA/÷ ÷ ÷ ÷ ÷ Hz
High Common-Mode Rejection Ratio: 100 dB
Models with MIL-STD 883 Processing Available
OP15
156 Speed with 155 Dissipation: 80 mW Typ
Wide Bandwidth: 6 MHz
High Slew Rate: 13 V/ s
Fast Settling to ±0.1%: 1,200 ns
OP17
Highest Slew Rate: 60 V/ s
Fastest Settling to ±0.1%: 600 ns
Highest Gain Bandwidth Product (A
Guaranteed Input Bias Current @ 125 C
LF157 Devices
INPUT
V+
V–
J3
J1
R1
C1
7.4pF
Q5
J2
J4
R3
Q6
Q8
J5
–INV
INPUT
Q12
VCL
J11
Q7
NULL
R8*
= 5 Min): 30 MHz
Figure 1. Simplified Schematic
J8
R3
R4
Q11
Q1
NULL
R7*
R5
3.6k
Q16
Q3
Q9
Q13
Q16
GENERAL DESCRIPTION
The ADI-JFET input series of devices offer clear advantages over
industry-generic devices and are superior in both cost and perfor-
mance to many dielectrically-isolated and hybrid op amps. All devices
offer offset voltages as low as 0.5 mV with TCV
5 mV/HC. A unique input bias cancellation circuit reduces the I
by a factor 10 over conventional designs. In addition ADI specifies
I
These devices were designed to provide real precision performance
along with high speed. Although they can be nulled, the design
objective was to provide low offset-voltage without nulling. Systems
generally become more cost effective as the number of trim circuits
is decreased. ADI achieves this performance by use of an improved
bipolar compatible JFET process coupled with on chip, zener-zap
offset trimming.
The OP15 provides an excellent combinations of high speed and
low input offset voltage. In addition, the OP15 offers the speed
of the 156A op amp with the power dissipation of a 155A. The
combination of a low input offset voltage of 500 mV, slew rate of
13 V/ms, and settling time of 1,200 ns to 0.1% makes the OP15
an op amp of both precision and speed. The additional features
of low supply current coupled with an input bias current makes
the OP15 ideal for a wide range of applications.
The OP17 has a slew rate of 60 V/ms and is the best choice for
applications requiring high closed-loop gain with high speed. See
OP42 datasheet for unity gain applications and the OP215 datasheet
for a dual configuration of the OP15.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
B
and I
Q4
J6
R2
OS
Q2
R6
3.6k
Q15
with the devices warmed up and operating at 25HC ambient.
C2
Q19
Q14
Operational Amplifiers
Q17
Precision JFET-Input
Q10
Q21
J9
Q24
Q20
J10
OP15/OP17
R13
© Analog Devices, Inc., 2002
*R7, R8 ARE ELECTRONICALLY
ADJUSTED ON CHIP FOR
MINIMUM OFFSET VOLTAGE.
Q23
R11
Q22
Q25
OS
www.analog.com
guaranteed to
OUTPUT
B

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op17gz Summary of contents

Page 1

... OS *R7, R8 ARE ELECTRONICALLY ADJUSTED ON CHIP FOR MINIMUM OFFSET VOLTAGE. Q19 Q24 Q17 R13 C2 Q2 Q10 J10 Q23 J9 R6 Q14 Q20 3.6k Q21 Q15 © Analog Devices, Inc., 2002 guaranteed Q22 OUTPUT Q25 R11 www.analog.com ...

Page 2

OP15/OP17–SPECIFICATIONS ELECTRICAL CHARACTERISTICS Parameter Symbol Conditions = 50 W Input Offset Voltage Input Offset Current I OS OP15 T = 25HC J Device Operating OP17 T = 25HC J Device Operating Input Bias Current I B ...

Page 3

Electrical Characteristics Parameter Input Offset Voltage 1 Average Input Offset Voltage Drift Without External Trim With External Trim 2 Input Offset Current OP17 2 Input Bias Current OP17 Input Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large Signal ...

Page 4

... BAL 4 V– 5 ORDERING GUIDE Package Options CERDIP SOIC OP15EZ OP17EZ OP15FZ* OP17FZ OP15GZ* OP15GS* OP17GZ SMD Part Number ADI Equivalent 5962-8954201GA* OP15AJMDA 5962-8954201PA* OP15AZMDA 5962-8954301GA* OP16AJMDA 5962-8954301PA* OP16AZMDA *Not recommended for new designs. Obsolete April 2002. –4– ...

Page 5

V = 15V – + +125 100 1k OUTPUT LOAD RESISTANCE – TPC 1. Maximum Output Swing vs. Load Performance ...

Page 6

OP15/OP17 TYPICAL DRIFT BAND –1 –3 –5 10k 100k R -TRIMMING POTENTIOMETER VALUE – P TPC 7. Nulled Offset Voltage Drift vs. Potentiometer Size 15V –2 –4 –6 ...

Page 7

MAX 10n 156A/157A TYP 1n OP17A TYP 100p 10p AMBIENT TEMPERATURE – C TPC 13. OP17 Input Bias Current vs. Ambient Temperature (Units Warmed Up in Free Air) 3.5 3.0 –55 C 2.5 ...

Page 8

OP15/OP17 18 16 PHASE MARGIN = > –2 –4 –6 –8 –10 1M 10M FREQUENCY – MHz TPC 19. OP15 Closed-Loop Bandwidth and Phase vs. Frequency 28 V ...

Page 9

NEGATIVE SUPPLY 100 1k 10k FREQUENCY – Hz TPC 25. OP15 Power Supply Rejection Ratio vs. Frequency 100 V = 15V 100 V 10 ...

Page 10

OP15/OP17 100k 1M FREQUENCY – MHz TPC 31. OP17 Maximum Output Swing vs. Frequency 110 NEGATIVE 100 90 80 POSITIVE –50 – AMBIENT TEMPERATURE – ...

Page 11

TEST CIRCUITS NOTE: V CAN BE TRIMMED WITH POTENTIOMETERS OS RANGING FROM 10k FOR MOST UNITS TCV WILL BE MINIMIZED WHEN V OS WITH A 100k POTENTIOMETER Figure 3. ...

Page 12

OP15/OP17 8-Lead Ceramic Dip – Glass Hermetic Seal [CERDIP] (Q-8) 0.13 (0.0051) 1.40 (0.0551) MIN MAX 8 5 7.87 (0.3089) PIN 1 5.59 (0.2201 2.54 (0.1000) BSC 10.29 (0.4051) MAX 1.52 (0.0600) 0.38 (0.0150) 5.08 (0.2000) MAX 3.81 ...

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