ak4373 ETC-unknow, ak4373 Datasheet - Page 21

• Manufacturer Part Number: ak4373
• Description: Low Power Stereo Dac With Hp/spk-amp
• Manufacturer: ETC-unknow

Parameter
Control Interface Timing (3-wire Serial mode)
Control Interface Timing (I
Power-down & Reset Timing
Note 36. I
Note 37. CCLK rising edge must not occur at the same time as CSN edge.
Note 38. Data must be held long enough to bridge the 300ns-transition time of SCL.
Note 39. The AK4373 can be reset by the PDN pin = “L”.
■
MS0991-E-00
SCL Clock Frequency
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low Time
Clock High Time
Setup Time for Repeated Start Condition
SDA Hold Time from SCL Falling
SDA Setup Time from SCL Rising
Rise Time of Both SDA and SCL Lines
Fall Time of Both SDA and SCL Lines
Capacitive Load on Bus
Setup Time for Stop Condition
Pulse Width of Spike Noise Suppressed by Input Filter
CCLK Period
CCLK Pulse Width Low
CDTI Setup Time
CDTI Hold Time
CSN “H” Time
CSN Edge to CCLK “↑”
CCLK “↑” to CSN Edge
PDN Pulse Width
Timing Diagram
MCKI Input
Pulse Width High
2
C is a registered trademark of Philips Semiconductors.
(Note
1000pF
2
39)
C Bus mode):
(Note
(Note
37)
37)
(Note
Figure 8. MCKI AC Coupling Timing
100kΩ
VSS3
(Note
38)
Measurement
Point
36)
- 21 -
VSS3
tHD:DAT
tHD:STA
tSU:DAT
tSU:STA
tSU:STO
Symbol
tCCKH
tCCKL
tHIGH
tLOW
tCDH
tCSW
tCCK
tCDS
tCSH
fSCL
tBUF
tCSS
tPD
tSP
Cb
tR
tF
min
200
150
150
1.3
0.6
0.1
0.6
0.6
1.3
0.6
80
80
40
40
50
50
0
0
-
-
-
-
tACW
1/fCLK
typ
tACW
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
max
400
400
0.3
0.3
50
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
VAC
[AK4373]
2008/09
Units
kHz
μs
μs
μs
μs
μs
μs
μs
μs
μs
pF
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns