73s1209f68im Maxim Integrated Products, Inc., 73s1209f68im Datasheet - Page 22
73s1209f68im
Manufacturer Part Number
73s1209f68im
Description
Self-contained Pinpad, Smart Card Reader Ic Uart To Iso7816 / Emv Bridge Ic
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.73S1209F68IM.pdf
(123 pages)
- Current page: 22 of 123
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It can be loaded as a 2-byte register (MOV DPTR,#data16) or as two registers (e.g. MOV DPL,#data8). It
is generally used to access external code or data space (e.g. MOVC A,@A+DPTR or MOVX A,@DPTR
respectively).
Program Counter: The program counter (PC) is 2 bytes wide initialized to 0x0000 after reset. This
Program Status Word (PSW):
Stack Pointer (SP): The stack pointer is a 1-byte register initialized to 0x07 after reset. This register is
incremented before PUSH and CALL instructions, causing the stack to begin at location 0x08.
Data Pointer: The data pointer (DPTR) is 2 bytes wide. The lower part is DPL, and the highest is DPH.
register is incremented during the fetching operation code or when operating on data from program
memory. Note: The program counter is not mapped to the SFR area.
Port Registers: The I/O ports are controlled by Special Function Registers
contents of the SFR can be observed on corresponding pins on the chip. Writing a 1 to any of the ports
(see
corresponding pin to be held at low level (GND). The data direction registers
individual pins as input or output pins (see the
22
PSW.7
PSW.6
PSW.5
PSW.4
PSW.3
PSW.2
PSW.1
PSW.0
Table
Bit
10) causes the corresponding pin to be at high level (3.3V), and writing a 0 causes the
MSB
CV
Symbol
RS1
RS0
OV
CV
AC
F0
F1
P
AC
Carry flag.
Auxiliary Carry flag for BCD operations.
General purpose Flag 0 available for user.
Register bank select control bits. The contents of RS1 and RS0 select
the working register bank:
Overflow flag.
General purpose Flag 1 available for user.
Parity flag, affected by hardware to indicate odd / even number of “one”
bits in the Accumulator, i.e. even parity.
F0
RS1/RS0
Table 9: PSW Register Flags
00
01
10
11
RS1
User (USR) Ports
Bank Selected
RS
Bank 0
Bank 1
Bank 2
Bank 3
Function
OV
section for details).
–
(0x00 – 0x07)
(0x08 – 0x0F)
(0x10 – 0x17)
(0x18 – 0x1F)
USR70
UDIR70
Location
and USR8. The
P
LSB
and
UDIR8
Rev. 1.2
define
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