73s1209f68im Maxim Integrated Products, Inc., 73s1209f68im Datasheet - Page 65

• Manufacturer Part Number: 73s1209f68im
• Description: Self-contained Pinpad, Smart Card Reader Ic Uart To Iso7816 / Emv Bridge Ic
• Manufacturer: Maxim Integrated Products, Inc.

DS_1209F_004
Keypad Scan Time Register (KSCAN): 0xD3
This register contains the values of scanning time and debouncing time.
Keypad Control/Status Register (KSTAT): 0xD4
This register is used to control the hardware keypad scanning and detection capabilities, as well as the
keypad interrupt control and status.
Rev. 1.2
KSCAN.7
KSCAN.6
KSCAN.5
KSCAN.4
KSCAN.3
KSCAN.2
KSCAN.1
KSCAN.0
KSTAT.7
KSTAT.6
KSTAT.5
KSTAT.4
KSTAT.3
KSTAT.2
KSTAT.1
KSTAT.0
MSB
DBTIME.5 DBTIME.4 DBTIME.3 DBTIME.2 DBTIME.1 DBTIME.0 SCTIME.1 SCTIME.0
Bit
Bit
MSB
–
DBTIME.5
DBTIME.4
DBTIME.3
DBTIME.2
DBTIME.1
DBTIME.0
SCTIME.1
SCTIME.0
HWSCEN
KEYDET
KYDTEN
KEYCLK
Symbol
Symbol
–
–
–
–
–
De-bounce time in 4ms increments. 1 = 4ms de-bounce time, 0x3F =
252ms, 0x00 = 256ms. Key presses and key releases are de-bounced by
this amount of time.
Scan time in ms. 01 = 1ms, 02 = 2ms, 00 = 3ms, 00 = 4ms. Time between
checking each key during keypad scanning.
The current state of the keyboard clock can be read from this bit.
Hardware Scan Enable – When set, the hardware will perform automatic
key scanning. When cleared, the firmware must perform the key scanning
manually (bypass mode).
Key Detect – When HWSCEN = 1 this bit is set causing an interrupt that
indicates a valid key press was detected and the key location can be read
from the Keypad Column and Row registers. When HWSCEN = 0, this bit
is an interrupt which indicates a falling edge on any Row input if all Row
inputs had been high previously (note: multiple Key Detect interrupts may
occur in this case due to the keypad switch bouncing). In all cases, this bit
is cleared when read. When HWSCEN = 0 and the keypad interface 1kHz
clock is disabled, a key press will still set this bit and cause an interrupt.
Key Detect Enable – When set, the KEYDET bit can cause an interrupt and
when cleared the KEYDET cannot cause an interrupt. KEYDET can still
get set even if the interrupt is not enabled.
–
Table 67: The KSCAN Register
Table 68: The KSTAT Register
–
0x00
KEYCLK HWSCEN KEYDET KYDTEN
0x00
Function
Function
73S1209F Data Sheet
LSB
LSB
65